Activating Simulation on Fail-Safe Analog Input Driver F_CH_AI in SIMATIC S7 F-Systems
To activate simulation and inject simulated values into the fail-safe analog input driver block 'F_CH_AI' (FB375) in SIMATIC S7 F-Systems on a CPU 414-4H or CPU 410-5H, you cannot directly connect standard data block (DB) variables to fail-safe inputs. Standard boolean and real signals must first be converted into fail-safe data types using 'F_BO_F' (Standard-to-F-BOOL) and 'F_R_F' (Standard-to-F-REAL) conversion blocks before wiring them to 'F_CH_AI.SIM_ON' and 'F_CH_AI.SIM_V'. Furthermore, the F-System safety runtime group must be compiled with safety administration rights, and simulation must be explicitly authorized.
Table of Contents
- Executive Summary
- Architectural and System Mechanics
- Step-by-Step Engineering and Implementation Procedure
- Verification
- Limitations and Operational Precautions
- Engineer FAQ
- Technical References
- Related Articles
- Related Tags
Executive Summary
In safety-instrumented systems (SIS) running SIMATIC S7 F-Systems, the F_CH_AI fail-safe driver block conditions analog signals from certified SIL-rated input modules (such as ET 200M or ET 200SP HA fail-safe analog inputs). During commissioning, loop checks, or functional safety testing, automation engineers frequently need to override field inputs by toggling SIM_ON and adjusting SIM_V from an operator test screen or standard commissioning data block. However, S7 F-Systems enforces strict boundaries between standard user logic and safety program code. Attempting to directly wire standard DB addresses to safety pins generates compilation aborts. This guide details fail-safe data boundary crossing, block wiring, and safety authorization.
Architectural and System Mechanics
Safety Program Architecture and Boundary Rules in S7 F-Systems:
- F-Execution Groups: Safety blocks execute within dedicated F-Runtime groups (e.g., triggered by OB35) monitored by safety watchdogs and CRC checksum calculations.
- Fail-Safe Data Types:
- Safety inputs (
F_BOOL,F_REAL) contain embedded parity and structural integrity validation. - Standard data block variables (
BOOL,REAL) lack fail-safe signatures. Direct connection in CFC is strictly prohibited by the F-Compiler. - F-Conversion Blocks:
F_BO_F: Converts standard BOOL (from DB, marker, or WinCC) toF_BOOL.F_R_F: Converts standard REAL toF_REAL.- Simulation Logic on
F_CH_AI: SIM_ON: When asserted, the block disconnects from the physical peripheral address (VALUE) and routesSIM_VtoV.- Quality Output
QUALITY: In simulation, output quality reflects simulated status (16#60), and the safety driver asserts maintenance flags.
Step-by-Step Engineering and Implementation Procedure
Step 1: Insert F-Boundary Conversion Blocks in CFC
- Open the fail-safe CFC chart containing the
F_CH_AIinstance. - Open the S7 F-Systems library, navigate to 'F-Control Blocks'.
- Insert an
F_BO_Fblock (Standard BOOL to F_BOOL) into the chart. - Insert an
F_R_Fblock (Standard REAL to F_REAL) into the chart.
Step 2: Wire Standard Simulation Variables to Conversion Blocks
- Create a standard global data block (e.g.,
DB_SimControl, non-safety) containing:
-SimEnable(BOOL)
-SimValue(REAL) - Interconnect
DB_SimControl.SimEnabletoF_BO_F.IN. - Interconnect
DB_SimControl.SimValuetoF_R_F.IN.
Step 3: Wire Conversion Outputs to F_CH_AI Driver Block
- Connect
F_BO_F.OUTtoF_CH_AI.SIM_ON. - Connect
F_R_F.OUTtoF_CH_AI.SIM_V.
Step 4: Compile and Download Safety Program
- In SIMATIC Manager, select 'CFC' -> 'Compile' -> 'Charts as Program'.
- The F-Compiler verifies safety data flow, recalculates safety CRCs, and generates safety signatures.
- Download the program to the CPU 414-4H; enter the Safety Password when prompted.
Verification
To verify fail-safe simulation operation:
1. Open the CFC chart in test mode; verify F_CH_AI.SIM_ON = 0 and F_CH_AI.V reflects live field mA signals.
2. In your test DB or WinCC screen, write SimValue = 50.0 and set SimEnable = 1.
3. Verify that F_CH_AI.SIM_ON transitions to 1 and F_CH_AI.V outputs 50.0 immediately.
4. Verify that downstream safety interlocks evaluate the simulated value properly.
5. Reset SimEnable = 0; verify the driver instantly returns to tracking physical field sensors.
Limitations and Operational Precautions
Operational precautions:
- Activating simulation on fail-safe channels temporarily bypasses physical process trip protections. Never enable simulation on live operating chemical or nuclear processes.
- All safety simulations must be audited and reset to 0 before signing off safety validation documents.
- Modifying safety connections changes the Safety Collective Signature (CRC), requiring re-verification of safety documentation.
Engineer FAQ
Q: Why does CFC reject connecting standard DB bits to F_CH_AI?
A: S7 F-Systems prohibits direct connections between standard and fail-safe logic to prevent unvalidated standard memory corruption from compromising the safety runtime.
Q: What blocks convert standard types to safety types?
A: Block F_BO_F converts BOOL to F_BOOL, and F_R_F converts REAL to F_REAL.
Q: Can simulation be forced directly on the ET 200 module?
A: Yes, through HW Config or SIMATIC Manager variable tables, but software simulation via F_CH_AI is preferred for automated testing.
Q: Does simulation generate a safety alarm in WinCC?
A: Yes, APL and F-Systems drivers assert simulation status (QUALITY = 16#60), generating a maintenance warning on the operator station.
Q: What CPU models support S7 F-Systems?
A: S7 F-Systems is supported on fail-safe S7-400H controllers, including CPU 414-4H, CPU 414-5H, CPU 417-5H, and CPU 410-5H.
Technical References
- SIMATIC S7 F/FH Systems - Configuring and Programming Manual
- SIMATIC Process Control System PCS 7 Advanced Process Library (APL)
- PCS 7 V9.0 SP3 Licenses and Configuration Limits
Related Articles
- Enabling and Configuring ET 200SP HA Fail-Safe I-O Modules in SIMATIC PCS 7 HW Config
- Resolving MonAnL Remaining in Simulation Mode After Resetting SimOn on Pcs7AnIn
- Step-by-Step Procedure for Replacing One CPU in a Redundant AS 410-5H System During RUN
Related Tags
F_CH_AI, S7 F-Systems, Fail-Safe Simulation, F_BO_F, CPU 414-4H