Cascading Multiple C_INTER5 Interlocks in SIMATIC PCS 7 CEMAT: Comprehensive Server and Client Integration

When cascading multiple C_INTER5 blocks to protect a single CEMAT drive (C_DRV_1D parameter ESVG), displaying all cascaded interlock faceplates on both OS Servers and OS Clients requires proper structural linking in CFC and script alignment in WinCC. In CFC, interconnect the output of each upstream C_INTER5 into the input of the downstream block and wire the block pointers via LNK_INT. On the Engineering Station, execute an OS Compile to generate interlock pointer tags, and ensure the CEMAT Client Project Editor has updated client GraCS scripts to pass the WinCC Server Prefix across nested child window containers.

Cascading Logic for CEMAT C_INTER5 Interlock Blocks

In heavy mineral processing applications, drive protection interlocks frequently exceed the 5-input capacity of a single C_INTER5 block. To accommodate 10 or 15 discrete safety permissives (such as multiple emergency pull-cords, bearing temperatures, chute overflow switches, and belt misalignment detectors), engineers cascade multiple C_INTER5 blocks in series.

In CFC, cascading involves two distinct layers: logical Boolean cascading (passing trip conditions from block to block) and diagnostic pointer cascading (enabling the WinCC faceplate to navigate through the entire chain of interlock popups).

Interconnecting Block Pointers (LNK_INT) in Continuous Function Charts

To ensure that both the PLC operating code and the WinCC faceplates understand the interlock chain:

Logical Interconnection: Connect the OUT pin of Block 1 (e.g., IL_01) into input I1 of Block 2 (IL_02). Connect IL_02.OUT into I1 of Block 3 (IL_03). Finally, connect IL_03.OUT to C_DRV_1D.ESVG.
Diagnostic Pointer Interconnection: On CEMAT blocks, the structural parameter LNK_INT establishes the faceplate navigation hierarchy. Connect IL_01.LNK_INT to IL_02.LNK_INT, and IL_02.LNK_INT to C_DRV_1D.LNK_INT.

Without the LNK_INT pointer, the AS-OS compiler cannot determine that IL_01 and IL_02 belong to the drive, leaving faceplate navigation buttons unlinked.

OS Compilation and Interlock Tag Structure Generation

When Compile OS runs, the AS-OS Engineering compiler inspects LNK_INT interconnections:

It creates WinCC structure tags for each C_INTER5 instance under the plant hierarchy path.
It writes internal pointer tags into the drive's structure tag referencing the exact tag names of the chained interlocks.
If this compilation is omitted or executed only for changes when structural pointers were modified, pointer tables in WinCC remain stale, breaking multi-box navigation.

Configuring Client Scripts for Hierarchical Interlock Popups

On OS Clients, opening nested interlock faceplates requires that the parent faceplate pass its Server Prefix down to the child popup container:

In the client project, open WinCC Explorer and run the CEMAT OS Project Editor to ensure all standard @PG_C_INTER5.PDL and @PG_C_INTER5_DIAG.PDL files are at the latest update level.
Verify that client GraCS contains the C-script function C_OpenInterlockFaceplate.fct, which parses the server prefix and opens secondary picture windows with full multi-client tag paths.

Cascaded Interlock Configuration and Wiring Matrix

The following table summarizes signal and pointer wiring across three cascaded C_INTER5 blocks:

Interlock BlockBoolean Input SourceBoolean Output DestinationDiagnostic Pointer (LNK_INT)Faceplate NavigationC_INTER5 #1 (Top)Field Sensors 1..5C_INTER5 #2.I1Connect to C_INTER5 #2.LNK_INTNavigates to Box 2C_INTER5 #2 (Middle)Sensors 6..9 + Box 1C_INTER5 #3.I1Connect to C_INTER5 #3.LNK_INTNavigates to Box 1 & 3C_INTER5 #3 (Final)Sensors 10..13 + Box 2C_DRV_1D.ESVGConnect to C_DRV_1D.LNK_INTPrimary Interlock BoxC_DRV_1D (Drive)C_INTER5 #3.OUTMotor Contactor CommandReceives pointer from Box 3Opens Box 3 on click

Verification

Verify cascaded interlock navigation through the following steps:

In WinCC Runtime on an OS Client, click the motor block icon to open @PG_C_DRV_1D.PDL.
Click the ESVG protection interlock button. Confirm that the primary interlock box opens displaying inputs from Box 3.
Click the navigation link button inside Box 3. Confirm that the secondary interlock box (Box 2) opens adjacent to it.
Click the navigation link button in Box 2. Confirm that Box 1 opens, revealing all 15 protection signals across the 3 popups.
Trip an input on Box 1 (Sensor 2). Confirm that the fault propagates through Box 2 and Box 3, trips C_DRV_1D.ESVG, and highlights the exact tripped sensor on Box 1.

Limitations and Operational Precautions

Consider these operational rules when cascading interlocks:

Inversion Settings: Remember that feeding an inverted input into another inverted input reverses logic; verify that cascaded output-to-input pins use standard non-inverted (active-high) logic.
Cycle Execution Order: In the CFC Runtime Editor, ensure C_INTER5 #1 executes before #2, which executes before #3, which executes before C_DRV_1D, preventing one-cycle propagation delays.
APL Alternative: If more than 15 interlocks are required, consider using an APL Intlk16 block instead of cascading four C_INTER5 blocks.