Configuring Impulse Control and Feedback Tracking in PCS 7 APL MotL Local Mode
In SIMATIC PCS 7 Advanced Process Library (APL) MotL (FB1850), Feature.Bit20 ('Disable calculation of impulse signals in local setting 2 and 4') suppresses both start (P_Start) and stop (P_Stop) impulse generation when tracking feedback (FbkRun) in local mode. If your application specifically requires a stop pulse (P_Stop) when feedback drops to 0 (FbkRun = 0) but prohibits a start pulse (P_Start) when FbkRun transitions to 1, you cannot rely solely on Feature.Bit20. Instead, set LocalSetting = 4 with Feature.Bit20 = 0 to allow impulse calculation, and insert an external edge-detection and gating interlock in CFC—such as an R_TRIG and AND block—to suppress the P_Start command path or reset it immediately before it reaches the field motor starter.
Table of Contents
- Executive Summary
- Architecture and Fundamental Mechanics
- Step-by-Step Implementation Procedure
- Verification
- Limitations and Operational Precautions
- Engineer FAQ
- Technical References
- Related Articles
- Related Tags
Executive Summary
The MotL (Motor Large, FB1850) block in the PCS 7 Advanced Process Library provides comprehensive motor control, interlocking, monitoring, and operating mode management. Operating modes include Automatic, Manual, Local, and Out of Service. In Local Mode, field control stations or local control panels drive the motor directly while the DCS tracks motor state and commands field contactors or variable frequency drives.
Engineers frequently configure pulse-controlled switchgear where short impulse signals (P_Start and P_Stop) trigger latching relays or remote starter coils. A recurring operational challenge arises when configuring asymmetric impulse requirements: generating a stop pulse when local motor run feedback is lost or stopped locally (FbkRun = 0), while strictly preventing the DCS from issuing a start pulse when local feedback turns on (FbkRun = 1). In standard APL configuration, Feature.Bit20 disables impulse calculation entirely for LocalSetting = 2 and LocalSetting = 4. This guide details the internal state machine governing APL impulse generation, evaluates the interaction between LocalSetting and Feature bits, and provides a verified CFC logic pattern to achieve asymmetric pulse control without compromising safety interlocks.
Architecture and Fundamental Mechanics
The MotL block evaluates operating modes and generates static (Start, Stop) and pulse (P_Start, P_Stop) outputs based on internal state logic:
1. Local Settings Architecture:
* LocalSetting = 1: Tracking with external commands. The block tracks inputs LocalStart and LocalStop via digital pins; commands are evaluated only when LocalLi = 1.
* LocalSetting = 2: Local mode without tracking, controlled locally at the machine. LocalOp is evaluated. Switching between modes via WinCC faceplate is disabled (greyed out) because mode selection is controlled via hardware input LocalLi.
* LocalSetting = 4: Local mode switchable via faceplate (LocalOp) or program interconnection (LocalLi). Tracking of FbkRun is active.
2. Impulse Calculation and Feature.Bit20:
* Standard APL pulse outputs P_Start and P_Stop generate a high pulse with duration configured by PulseWidth (default 3.0 s).
* By default (Feature.Bit20 = 0), whenever FbkRun changes state while in Local Mode with tracking, MotL asserts P_Start upon a rising edge of FbkRun and P_Stop upon a falling edge of FbkRun to ensure switchgear alignment.
* When Feature.Bit20 = 1 ('Disable calculation of impulse signals in local setting 2 and 4'), the block completely bypasses the pulse generation subroutines during feedback transitions. Consequently, neither P_Start nor P_Stop is pulsed.
3. Asymmetric Operational Demand: When switchgear circuits require a definite stop pulse from the DCS to open the trip coil upon unexpected motor stop, but safety regulations strictly prohibit the DCS from pulsing the start circuit when the motor is started locally, Feature.Bit20 alone cannot satisfy both requirements simultaneously. Gating the output pulse externally in CFC preserves standard APL block integrity while enforcing application-specific electrical interlocks.
Step-by-Step Implementation Procedure
Step 1: Configure MotL Block Operating Mode and Feature Bits
- In the CFC editor, locate the target
MotL(FB1850) block instance. - Set
LocalSetting = 4to allow flexible mode selection via WinCC faceplate or automation logic. - Ensure
Feature.Bit20 = 0so that the internal impulse generation logic remains active for both start and stop events. - Set
PulseWidthto the duration required by your switchgear trip coil (e.g.,2.0seconds).
Step 2: Implement CFC Gating Logic for P_Start Suppression
- In the same CFC chart, instantiate a standard digital gate from the PCS 7 Basis Library or standard library: an
ANDblock (e.g.,AND_4orAND_2). - Interconnect the
P_Startoutput ofMotLto Input 1 of theANDblock. - Connect a condition to Input 2 of the
ANDblock that evaluates the active operating mode: invert theLocalAct.Valueoutput (or use an expression checking that the motor is NOT in local mode).
* In Local Mode (LocalAct = 1), theANDgate output is held at0, completely blockingP_Startpulses from reaching the hardware output.
* In Auto or Manual modes (LocalAct = 0),P_Startpulses pass through unaffected to the field start relay.
Step 3: Connect P_Stop Directly to Field Output Channel Driver
- Interconnect the
P_Stopoutput ofMotLdirectly to thePcs7DiOuchannel driver servicing the field trip contactor. - When the motor is running in Local Mode and
FbkRuntransitions from1to0,MotLdetects the falling edge and assertsP_Stopfor the configuredPulseWidthduration.
Step 4: Verify Feedback Monitoring and Discrepancy Timers
- Check parameter
MonTiDynamic(dynamic monitoring time) onMotLto ensure that feedback transitions within the expected window during normal starts and stops. - Ensure
FbkRunis wired to a validated digital input channel driver (Pcs7DiIn).
Step 5: Compile and Download CFC Changes
- Compile the CFC chart folder (
Chart > Compile > Changes only). - Download changes to the AS controller (
Target System > Download > Changes).
Verification
- In WinCC Runtime, open the
MotLfaceplate and switch the operating mode to 'Local'. - In the field or test bench, simulate motor starting: assert
FbkRun = 1. - In CFC test mode, verify that
MotL.P_Startmay pulse internally, but the external gating block holds the field output at0. Confirm no start pulse is transmitted to field equipment. - Simulate motor stopping: toggle
FbkRunfrom1to0. - Verify that
MotL.P_Stoptransitions to1for the exactPulseWidthduration (e.g., 2.0 s) and the field output driver activates the trip circuit. - Switch back to 'Automatic' or 'Manual' mode and verify that both
P_StartandP_Stopfunction normally.
Limitations and Operational Precautions
- Modifying impulse paths outside the standard block requires clear documentation in CFC chart notes to prevent future maintenance confusion.
- Never bypass safety interlocks (
Intlock,Permit,Protect) when configuring external gating logic. LocalSetting = 2permanently disables faceplate mode selection; if operator mode switching via WinCC is required,LocalSetting = 4orLocalSetting = 5must be used.- When using high-speed frequency drives over PROFINET/PROFIBUS (e.g., via
FbDrive), static control words (STW1) are typically preferred over pulsed contacts.
Engineer FAQ
Why does LocalSetting = 2 disable mode switching on the faceplate?
In LocalSetting = 2, local mode is hardwired to an external field selector switch (LocalLi). The block locks out faceplate controls to ensure that local physical safety commands cannot be overridden from the control room.
Can Feature.Bit20 disable P_Start while keeping P_Stop active?
No. Feature.Bit20 operates symmetrically; when set to 1, it suppresses both P_Start and P_Stop impulse calculations during feedback tracking.
What is the default pulse duration for P_Start and P_Stop?
The default duration is 3.0 seconds, configured via the PulseWidth parameter on the MotL block.
Does MotL support 2-wire maintained contactors instead of pulses?
Yes. Maintained contactors utilize the static Start output (e.g., Start = 1 to run, Start = 0 to stop) instead of impulse outputs.
Do custom CFC gating blocks consume additional AS Process Object licenses?
No. Standard elementary logic blocks (such as AND, OR, XOR) from the PCS 7 Basis Library do not consume AS RT Process Objects.
Technical References
- SIMATIC Process Control System PCS 7 Advanced Process Library (APL) Function Manual (Entry ID: 109794385)
- SIMATIC Process Control System PCS 7 Motors and Drives Engineering Guide (Entry ID: 109758814)
- IEC 61131-3 Programmable Controllers - Programming Languages (Standard Logic Blocks)
Related Articles
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- Understanding Step Actions and Signal Retention in SIMATIC PCS 7 SFC Sequences
- Configuring Automatic Mode Switchover to Manual on Control System Fault (CSF) in PCS 7 APL PIDConL
Related Tags
- MotL
- APL
- Local Mode
- Feature Bits
- Impulse Control