Configuring Process Image Partitions (PIP) in SIMATIC PCS 7 - Assigning I-O Modules to Cyclic Interrupt OBs

In SIMATIC PCS 7, segregating process I/O modules and assigning them to Process Image Partitions (PIP / TPA) synchronizes physical I/O updates with the exact cyclic interrupt organization blocks (OB30 to OB38) where channel drivers execute. By default, unassigned modules update in OB1 (Process Image Input/Output - PII/PIQ); however, in PCS 7, OB1 execution is non-deterministic and slow, resulting in stale process values or high CPU communication overhead from direct peripheral access (PIW/PQW). Assigning I/O modules to a Process Image Partition linked to OB35 (e.g. PIP 1 at 100 ms) guarantees deterministic, hardware-synchronized sampling prior to block execution.

Process Image Architecture in S7-400 and PCS 7

In SIMATIC S7-400 and CPU 410-5H controllers, input and output addressing operates through two distinct mechanisms:
1. OB1 Process Image (OB1-PI): Automatically updated at the beginning and end of OB1. In traditional PLCs, OB1 runs continuously. However, in PCS 7, process logic is executed primarily in Cyclic Interrupt OBs (OB30 to OB38), rendering OB1 scan rates variable and unsuited for deterministic closed-loop control.
2. Process Image Partitions (PIP / Teilprozessabbild - TPA): The CPU memory allows partitioning the process image into independent partitions (PIP 1 to PIP 15). Each partition is linked directly to an execution OB (e.g. PIP 1 linked to OB35).
3. Synchronized OS Execution: At the start of OB35, the CPU operating system automatically reads all field inputs assigned to PIP 1 from the fieldbus. At the conclusion of OB35, it writes all output values to the modules in a single batch telegram.

The Operational Risk of Default OB1 Process Image Assignment

When an engineering team neglects PIP configuration:
* Stale Analog Values: A PID controller running in OB35 (100 ms) reads input signals updated by OB1. If OB1 takes 300 ms to execute due to background communication load, the PID block processes identical stale data for three consecutive execution cycles!
* CPU Cycle Time Overrun via Direct Access: To avoid stale OB1 data, channel drivers (Pcs7AnIn, CH_AI) default to direct peripheral access (PIW / PAW). Direct access halts CPU execution while reading across the backplane and fieldbus for every individual channel, drastically increasing CPU cycle time and risking watchdog trips.

Step-by-Step PIP Assignment and Configuration in HW Config

Follow this procedure to assign I/O modules to Process Image Partitions:

[Phase 1: Configure CPU Process Image Partition Linking]
   │  • Open HW Config -> Double-click the CPU 41x / 410-5H object
   │  • Select tab: "Cycle/Clock Memory" (or "Process Image")
   │  • Verify the partition linking:
   │      - Partition 1 (PIP 1) -> Assigned to: OB35 (e.g. 100 ms)
   │      - Partition 2 (PIP 2) -> Assigned to: OB34 (e.g. 200 ms)
   │      - Partition 3 (PIP 3) -> Assigned to: OB32 (e.g. 1000 ms)
   │
[Phase 2: Assign Distributed I/O Modules to Partitions]
   │  • In HW Config, select the distributed I/O station (e.g. ET 200M / ET 200SP HA)
   │  • Double-click an Analog Input or Digital Input module
   │  • In Object Properties -> Select tab: "Addresses"
   │  • Locate dropdown: "Process Image"
   │  • Change setting from "OB1-PI" to: "PIP 1" (matches OB35 execution)
   │  • Repeat for corresponding output cards (PIP 1)
   │
[Phase 3: Compile and Generate Module Drivers in CFC]
   │  • In HW Config: Station -> Save and Compile
   │  • In SIMATIC Manager: Open CFC -> Chart -> Compile -> Changes Only
   │  • Ensure "Generate module drivers" is checked!
   │  • The compiler automatically switches channel drivers to read from the PIP!

Process Image Partition vs Direct Peripheral Access Comparison

Understand the operational differences between I/O update methods:

Update MechanismExecution TimingCPU OverheadBus Traffic EfficiencyControl Loop DeterminismDefault OB1 Process ImageVariable (OB1 cycle end)LowestMediumPoor (Non-deterministic updates)Direct Peripheral Access (PIW)On-demand per block callExtremely HighInefficient (Fragmented reads)Moderate (High CPU jitter)Process Image Partition (PIP)Hardware-synchronized with OBOptimized / LowMaximum (Burst telegrams)Optimal (Sub-millisecond jitter)

Verification

To confirm proper Process Image Partition operation:
1. In HW Config, verify that module address properties display PIP 1 instead of OB1-PI.
2. Open the CPU Diagnostic Buffer; confirm that zero I/O access errors (PEU / direct access timeouts) are logged.
3. In CFC Editor, open an analog channel driver (Pcs7AnIn); verify parameter Mode indicates process image access rather than direct peripheral addressing.
4. Measure CPU scan time in STEP 7 Module Information -> Performance Data; verify that OB35 execution duration drops significantly due to elimination of direct PIW reads.

Limitations and Operational Precautions

Never assign an I/O card to a high-frequency partition (such as PIP 1 / OB35) if its channel driver block is scheduled in a slow task (such as OB32 / 1000 ms). Doing so wastes CPU processing time updating inputs that are only evaluated once per second. Always match the hardware Process Image Partition directly to the cyclic interrupt OB where the channel driver block resides.

Engineer FAQ

What is the maximum size of a Process Image Partition in S7-400?

In S7-400 and CPU 410-5H, the total process image size is configurable up to 16 KB (16,384 bytes) shared across all partitions.

Does changing a module to PIP require a CPU STOP download?

In PCS 7 systems supporting Configuration in RUN (CiR), address modifications within reserved CiR limits can be downloaded in RUN mode. Otherwise, changing process image assignment requires a CPU STOP download.

Why do PCS 7 channel drivers default to direct access if PIP is not configured?

Siemens channel drivers detect whether the hardware address is in the process image partition assigned to the calling OB. If it is not, the driver falls back to direct PIW access to avoid reading stale data.