Diagnosing Erratic Minute Pulse Generation and Clock Jumps in CEMAT Systems

Diagnosing Erratic Minute Pulse Generation and Clock Jumps in CEMAT Systems

In SIMATIC PCS 7 CEMAT systems running on S7-400 controllers (such as CPU 417-4H), the 1-minute system marker pulse CHANGE_MIN (memory address M4.2) begins pulsing erratically—every few seconds or at 30-second intervals—when the CPU's real-time clock experiences time jumps or competing time synchronization masters. CEMAT generates CHANGE_MIN by detecting transitions in the CPU real-time clock's minute digit; if unsynchronized time telegrams from multiple NTP masters or OS servers force backwards or forwards clock steps, CHANGE_MIN triggers falsely on every step correction. To resolve this, configure a single central time master in HW Config and eliminate conflicting time telegram sources.

Table of Contents

Architecture of CEMAT Time Generation and CHANGE_MIN Marker

In the minerals and cement automation standard CEMAT (running within SIMATIC PCS 7), centralized timing pulses coordinate runtime monitoring across technological blocks (such as C_DRV_1D, C_DRV_2D, C_VALVE, and C_GROUP).

Rather than implementing thousands of individual software timers in S7-400 CPUs (6ES7417-4HT14-0AB0 or 6ES7410-5HX08-0AB0), CEMAT uses standard system clock marker flags configured in the CPU properties and evaluated in OB1 / cyclic interrupt OBs:
* CHANGE_SEC (typically M4.1): 1-second edge pulse.
* CHANGE_MIN (typically M4.2): 1-minute edge pulse.
* CHANGE_HOUR (typically M4.3): 1-hour edge pulse.

Technological blocks decrement internal countdown registers (e.g., fault warning delays, runtime counters, and startup horn timers) on the positive edge of CHANGE_MIN. If this pulse becomes unstable, equipment operating hours, warning horns, and motor feedback monitoring timers become wildly inaccurate.

Root Causes of Erratic Clock Pulse Generation and System Jumps

The standard CEMAT time generator block (C_SIMOS or C_TIME) computes CHANGE_MIN by reading the CPU real-time clock via SFC1 (READ_CLK) and comparing the minute value (DATE_AND_TIME[4]) against the minute evaluated in the previous cycle:

$$\Delta M = M_{\text{current}} - M_{\text{previous}}$$

When the minute changes, the block emits a one-cycle pulse on M4.2. Under normal conditions, this pulse occurs exactly once every 60 seconds. However, if external factors alter the CPU clock dynamically:
1. Clock Step Backward: An unsynchronized time master sets the clock back 15 seconds (e.g., from 10:05:05 to 10:04:50). When the clock naturally crosses 10:05:00 again 10 seconds later, CHANGE_MIN pulses a second time.
2. Competing Time Masters: If both the plant OS Server (broadcasting SIMATIC time telegrams) and an external NTP GPS server (broadcasting NTP telegrams) are active simultaneously on the Industrial Ethernet CP (6GK7443-1EX30-0XE0), the CPU clock oscillates continuously between the two time sources.
3. Improper Time Synchronization Mode: Operating in As In Synch mode without smoothing causes instantaneous step corrections rather than smooth slewing adjustments.

Diagnosing Clock Synchronization Telegrams in S7-400 Controllers

The following diagnostic table isolates the parameters responsible for real-time clock stability:

Diagnostic Tool / InterfaceLocationVerification TargetExpected Nominal StatusCPU Diagnostic BufferSIMATIC Manager > Module InformationEvent ID 16#4501 / 16#4502"Time of day set" events should occur only on planned maintenance, never periodically.CP 443-1 PropertiesHW Config > Industrial Ethernet CP > TimeNTP Mode vs SIMATIC ModeExactly one synchronization mode selected; one master IP.CPU Hardware PropertiesHW Config > CPU > Diagnostics/ClockClock Synchronization settingSynchronization mode set to Slave on MPI/PB or None.WinCC Time SynchronizationWinCC Explorer > Time SynchronizationOS as Time Master vs SlaveOnly one master OS server broadcasting time across terminal bus.

Table 1: Time synchronization diagnostic checkpoints in S7-400 and PCS 7.

Configuring Unified Time Synchronization in HW Config and OS

To restore a stable 1-minute pulse for CEMAT:

  1. Establish a Single Plant Time Master:
    * Designate a dedicated hardware time server (e.g., SICLOCK TC 100/TC 400) or one master OS Server as the authoritative NTP server.
  2. Configure Industrial Ethernet CP in HW Config:
    * Open the S7-400 hardware configuration in SIMATIC Manager.
    * Open the properties of the CP 443-1 Ethernet module (6GK7443-1EX30-0XE0).
    * Switch to the Time-of-Day Synchronization tab.
    * Check Enable NTP mode.
    * Enter the IP address of the primary NTP server.
    * Uncheck SIMATIC mode to prevent conflicting broadcast telegrams.
    * Set synchronization interval to standard interval (e.g., 10 seconds).
  3. Align CPU Properties:
    * Open CPU properties > Diagnostics/Clock.
    * Ensure synchronization mode on MPI and internal backplane bus is set to As Slave or disabled.
  4. Compile and Download Hardware Configuration:
    * Download HW Config to the controller during a scheduled operational pause.
    * Verify that the CPU diagnostic buffer stops logging frequent clock adjustments.

Verification

To confirm that CHANGE_MIN generates accurate 1-minute pulses:

  1. In SIMATIC Manager, open a Variable Table (VAT).
  2. Insert tags: M4.2 (BOOL, display as bit) and CPU system clock DATE_AND_TIME.
  3. Add a test counter block in CFC incremented by M4.2.
  4. Monitor the counter over a 10-minute test period:
    * Verify that the counter increments exactly 10 times in 600 seconds.
    * Verify that no rapid multiple triggers occur within 2 to 30 seconds.
  5. In WinCC Runtime, open a CEMAT motor faceplate and confirm that warning horn and run-monitoring countdown timers decrement steadily by 1 second each second.

Limitations and Operational Precautions

  • Never change the CPU time zone or time configuration while CEMAT kiln, mill, or conveyor sequence groups are running, as abrupt clock jumps can trigger drive interlock timeouts and trip equipment.
  • Ensure that daylight saving time (DST) adjustments are configured with smooth transitional ramping or scheduled during planned shutdowns to prevent batch and counter errors.
  • Memory byte MB4 must not be overwritten or used by any other CFC chart, user FC, or communication driver.

Engineer FAQ

Can I generate the 1-minute pulse using an OB35 timer instead of the CPU clock?

Yes. While CEMAT standard templates default to CPU clock evaluation via M4.2, an engineer can generate an independent 60-second pulse using an integer counter in cyclic interrupt OB35 (100 ms). However, this counter will not be synchronized to wall-clock minutes.

Why does CEMAT use clock markers instead of individual IEC timers (TON)?

A large cement plant often contains over 2,000 drives and valves. Instantiating thousands of individual TON timer blocks consumes massive CPU memory and processing time; evaluating a centralized pulse (CHANGE_MIN) reduces CPU scan cycle overhead by more than 80%.

What happens to CEMAT blocks if M4.2 remains permanently TRUE?

If M4.2 remains permanently TRUE, the rising edge detector fails to fire, and all countdown timers freeze, preventing faults from being annunciated.

Technical References

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Related Tags

  • CEMAT
  • CHANGE_MIN
  • M4.2
  • S7-400H
  • Time Synchronization
  • NTP
  • PCS 7
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