Diagnosing Pcs7AnIn Channel Driver Inactive Output (PV_Out) and Missing Module Driver Interconnections

In SIMATIC PCS 7 V9.0 SP2, when an APL analog input channel driver (Pcs7AnIn FB1869) reads a valid field sensor value on PV_In but fails to update PV_Out, the failure is caused by missing module driver diagnostic connections (Mode, DataXchg, MS, MS_Xchg). Without an active Mode interconnection from the diagnostic driver block (MOD_D1 or MOD_PALO), Mode defaults to 16#0 (unconfigured), causing Pcs7AnIn to suppress PV_Out. This occurs when the I/O address is not assigned to a process image partition (PIP) linked to the cyclic interrupt OB, symbolic addressing from HW Config is omitted, or 'Generate module drivers' is unchecked during compilation. To resolve, map the module to an active PIP, interconnect PV_In via symbolic tag, and compile charts with 'Generate module drivers' enabled.

Executive Summary

During field loop commissioning in PCS 7 V9.0 SP2, engineers occasionally encounter a scenario where the analog channel driver block Pcs7AnIn (FB1869) displays a live, changing raw peripheral word on its input PV_In (e.g., IW 512), but its engineering output PV_Out remains static, zero, or un-updated. Furthermore, manual value changes in a variable table (VAT) hold until simulation is toggled. Investigation typically reveals that the block's diagnostic inputs (Mode, DataXchg, MS) were never automatically interconnected by the PCS 7 compiler. This guide explains the module driver generation mechanism, explains why unlinked Mode parameters inhibit PV_Out, and provides step-by-step resolution procedures.

Architecture and Fundamental Mechanics

The PCS 7 Advanced Process Library (APL) channel driver architecture separates raw peripheral conversion from signal quality evaluation:
1. Role of Diagnostic Interconnections (Mode, DataXchg, MS):
- Pcs7AnIn does not merely convert 4–20 mA raw counts (0–27648) to engineering units; it monitors module health, wire break, and channel validity.
- The input Mode (DWORD) encodes module type, measurement range, and operating mode. If Mode = 16#00000000, the block determines the hardware channel is unconfigured or non-existent, forcing PV_Out to remain un-updated or hold last valid state.
2. Automatic Module Driver Generator (Chart -> Compile -> Generate module drivers):
- When compiling CFC charts, the compiler inspects all instantiated channel drivers (Pcs7AnIn, Pcs7DiIn, etc.).
- If PV_In is interconnected to an I/O symbol defined in HW Config, the compiler automatically generates hardware diagnostic blocks (MOD_D1, OB_BEGIN, OR_M_16) in system chart @OM and links their diagnostic outputs (DXchg, MS, Mode) to Pcs7AnIn.
3. Failure Mechanisms that Inhibit Generation:
- Direct Absolute Addressing: Interconnecting PV_In to raw absolute address PIW 512 without a symbolic name defined in HW Config prevents the compiler from linking the channel to its physical slot.
- Process Image Partition (PIP) Mismatch: If the analog input module is assigned to PIP 1 in HW Config, but the CFC chart containing Pcs7AnIn runs in OB35 (which reads PIP 2 or the default process image), the driver generator cannot synchronize execution.
- Disabled Generation Option: Unchecking 'Generate module drivers' in the Chart Compile dialog prevents any driver synthesis.

Step-by-Step Implementation Procedure

Verify Symbol Definition in HW Config:
a. Open HW Config for the target AS station.
b. Locate the analog input module (e.g., SM 331 8xAI 4-20mA).
c. Right-click the module and select Edit Symbols....
d. Confirm that every active channel address (e.g., IW 512) has a unique symbolic name assigned (e.g., FIT_101_Raw) and data type WORD.
Assign Process Image Partition (PIP) Matching OB Execution:
a. In HW Config, double-click the analog input module to open 'Object Properties'.
b. Navigate to the 'Addresses' tab.
c. Under 'Process Image', assign the inputs to the Process Image Partition corresponding to the cyclic interrupt OB where Pcs7AnIn runs (e.g., OB35 -> PIP 1).
d. Save and compile HW Config and download to the controller.
Connect PV_In via Symbolic Address in CFC:
a. Open the CFC chart containing Pcs7AnIn.
b. Delete any raw absolute address connection on PV_In.
c. Right-click PV_In, select Interconnection to Address..., and select the symbolic tag FIT_101_Raw.
Execute CFC Compilation with Module Drivers Enabled:
a. In CFC Editor, select Chart -> Compile -> Charts as Program.
b. Under 'Scope', select 'Changes only' (or 'Entire program').
c. Crucial: Ensure the checkbox 'Generate module drivers' is strictly checked.
d. Click 'OK' and allow the compiler to build system charts and diagnostic cross-references.
Inspect Diagnostic Connections on Pcs7AnIn:
a. Reopen the CFC chart after compilation.
b. Verify that Mode, DataXchg, and MS inputs now show green interconnections linked to @MOD_... diagnostic blocks.
c. Confirm that Mode displays a valid hexadecimal value (e.g., 16#40000201 for 4–20 mA current measurement).

Verification

Go online with the CFC chart containing Pcs7AnIn.
Confirm that PV_In shows the raw incoming peripheral integer (e.g., 13824 for 50% span).
Confirm that PV_Out.Value accurately reflects the scaled engineering value (e.g., 50.0 m3/h) with Signal Quality 16#80 (Good).
Confirm that Bad.Value = 0 and ErrorNum = 0.

Limitations and Operational Precautions

Never force or write manual values to Mode or DataXchg in runtime; these parameters must be dynamically generated by the PCS 7 system driver compiler to maintain safety diagnostics and channel integrity.

Engineer FAQ

Why is PV_Out not updated even when PV_In has a valid raw value?

If diagnostic parameter 'Mode' is not interconnected by the module driver generator, it defaults to 16#0, which signals an unconfigured channel and suppresses PV_Out.

Why did the compiler fail to generate module driver connections?

Most commonly because PV_In was connected via an absolute address without a symbol in HW Config, or 'Generate module drivers' was unchecked during compilation.

What does the 'Mode' input on Pcs7AnIn represent?

Mode is a DWORD that specifies the sensor measurement type (current, voltage, RTD), range, and module diagnostic status.

Can I use PIW addressing instead of IW on Pcs7AnIn?

APL channel drivers require process image addressing (IW) assigned to Process Image Partitions (PIPs). Direct peripheral access (PIW) bypasses PIP synchronization.