Digital Monitoring and Alarm Acknowledgment in PCS 7: Classic DIG_MON vs APL MonDiL and Fault Reset Strategies

In SIMATIC PCS 7, the classic library block DIG_MON (FB62) maintains its output Q at 1 strictly as long as the monitored digital input condition remains asserted; it possesses no built-in drop-out delay or acknowledgment feedback pin. To introduce an off-delay in DIG_MON, engineers must cascade an external TIMER_P block. In modern PCS 7, the Advanced Process Library (APL) equivalent MonDiL (FB1847) natively provides on/off delay parameters (Out_DG, Out_DC) and acknowledgment tracking (MsgAckn1). In industrial automation philosophy, alarm acknowledgment (operator awareness) must be strictly decoupled from fault resetting (clearing trips via latched flip-flops and reset commands).

Evolution of Digital Monitoring Blocks: Classic DIG_MON vs APL MonDiL

In SIMATIC PCS 7, monitoring digital field sensors (e.g., pressure switches, level float switches, thermal overloads) is accomplished using standard technological blocks. In legacy projects using the PCS 7 Standard Library, DIG_MON (FB62) served as the primary digital monitor. In modern PCS 7 systems (V7.1 through V9.1+), the Advanced Process Library (APL) replaced DIG_MON with MonDiL (FB1847).

Engineers maintaining legacy systems frequently encounter architectural limitations when attempting to implement signal holding times, delay timers, or alarm acknowledgment detection inside CFC.

Output Q Behavior and Timing Characteristics in DIG_MON (FB62)

The classic DIG_MON block operates with basic combinational logic:

When the digital input signal violates the monitored healthy state (e.g., input goes from 0 to 1), output Q switches to 1 immediately, and an ALARM_8P message is triggered.
When the input signal clears and returns to normal (0), output Q drops to 0 instantaneously.
No Built-in Timer: DIG_MON contains no parameter to configure how long Q remains asserted after the event clears. If an off-delay is required (e.g. to filter bouncing contacts or maintain a trip indication), an external TIMER_P (FB5) block must be cascaded on output Q.
No Acknowledgment Output: DIG_MON has no CFC output reflecting whether an operator acknowledged the message in WinCC.

Decoupling Alarm Acknowledgment from Fault Resetting (NAMUR / ISA-18.2)

A foundational tenet of industrial process safety (aligned with NAMUR guidelines and ISA-18.2) is the strict separation between acknowledgment and resetting:

Acknowledgment (Quittieren): An informational confirmation by the control room operator indicating that an abnormal alarm event has been noticed. Acknowledging an alarm must never alter the operating state of field machinery or re-energize a tripped motor.
Resetting (Rücksetzen): A conscious operational command issued after field inspection confirming that the physical fault condition has been rectified. Resetting unlatches the electrical shutdown circuit, permitting automated restarting.
If a pump trips on low discharge pressure and stops, pressure naturally drops to 0. If the trip logic evaluated raw unlatched switch states, the pump would enter an endless start-trip-start loop. Therefore, faults must be latched in S7 memory using a set-reset flip-flop (RS/SR).

Configuring Delay Timers and Acknowledgment Feedback in CFC

In the modern APL block MonDiL (FB1847), these capabilities are integrated natively:

Out_DG: On-delay time (delay going) in seconds, filtering intermittent sensor chatter.
Out_DC: Off-delay time (delay coming) in seconds, keeping output Out asserted for a defined duration after the fault clears.
MsgAckn1: Boolean output in CFC that reports 1 when the operator has acknowledged the alarm on the WinCC OS.
RstLi / ResetOp: Native inputs to reset latched fault states directly from faceplates or external sequences.

Comparative Technological Feature Matrix: DIG_MON vs MonDiL

The following table compares capabilities between classic and modern digital monitoring blocks:

Engineering FeatureClassic DIG_MON (FB62)Modern APL MonDiL (FB1847)Technological PurposeMonitored OutputQOutPrimary digital status signalIntegrated On-DelayNone (Requires external TIMER_P)Out_DG (Seconds)Suppresses transient nuisance spikesIntegrated Off-DelayNone (Requires external TIMER_P)Out_DC (Seconds)Extends fault pulse for slow sequencesMessage Acknowledgment OutputNoneMsgAckn1Indicates WinCC operator acknowledgment in ASIntegrated Failsafe LatchNo (Requires external RS block)Configurable via Feature bitsPrevents automatic restart on fault clearJump to Faceplate (OpTrig)NoYes (Configurable button)Allows jumping directly to reset faceplates

Step-by-Step Implementation of a Latching Fault Circuit with Central Reset

To implement a robust, safety-compliant digital fault latch in CFC:

Insert Memory Flip-Flop: In the CFC chart, insert an RS (Reset Priority) block from the Standard Library.
Connect Fault Trigger: Connect the digital sensor fault signal (e.g. pressure switch fault) to the Set input (S) of the RS block.
Route to Monitoring Block: Connect the output (Q) of the RS block to the input of DIG_MON (or MonDiL.In).
Connect Interlock: Connect RS.Q (inverted) into the interlock input (Intlock or Protect) of the associated motor block (MotL).
Implement Reset Trigger: Insert an OpTrig (Operator Trigger) block. Connect its output pulse to RS.R1 (Reset input).
Add Central Plant Reset (Optional): Connect a plant-wide reset command to an OR block feeding RS.R1, enabling single-click resetting of all cleared faults across the plant graphic.
Compile CFC charts and download to the AS controller.

Verification

Verify fault latching and reset mechanics through these tests:

Trip Assertion: Force the pressure switch input to fault state. Verify the motor trips, RS.Q latches to 1, and an alarm sounds in WinCC.
Sensor Recovery: Return the pressure switch to healthy state. Verify that RS.Q remains latched at 1 and the motor remains locked stopped.
Acknowledgment Independence: Acknowledge the alarm on the WinCC alarm banner. Verify the alarm silence occurs, but the motor remains stopped.
Reset Verification: Click the Reset button on the faceplate. Confirm RS.Q clears to 0, clearing the motor interlock and permitting restart.

Limitations and Operational Precautions

Observe the following design precautions:

Never Auto-Reset Safety Trips: Do not wire alarm acknowledgment directly into the fault reset input; resetting must remain a distinct operator decision.
Safety Instrument Architecture: Software-based latching in standard S7-400 CPUs does not replace hardwired safety relays or Safety Instrumented Systems (SIS) rated for SIL 2 / SIL 3 under IEC 61511.
Commercial Accuracy Disclaimer: Software order numbers (MLFBs), package structures, and hardware capacity prerequisites vary across PCS 7 versions and hardware platforms. System integrators must confirm exact software entitlements and licensing requirements against the official Siemens Catalog CA 01 and obtain an authorized Siemens distributor quotation prior to purchasing.

Engineer FAQ

Does DIG_MON provide an output indicating if the alarm was acknowledged?

No. The classic DIG_MON block has no acknowledgment feedback pin; the modern APL block MonDiL provides this via output MsgAckn1.

How do I implement a central reset for all latched faults in a plant picture?

Connect the reset inputs of all fault flip-flops (RS blocks) to a central OpTrig block or central command signal in CFC.

Can DIG_MON blocks be migrated automatically to APL MonDiL?

No automatic conversion exists; migrating from the Classic Standard Library to APL requires replacing the block instances in CFC and re-linking signals.