C135 PCS 7 (PCS7)
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Evaluating CPU Memory Consumption Differences Between Control Module Types (CMT) and Standard CFCs

Evaluating CPU Memory Consumption Differences Between Control Module Types (CMT) and Standard CFCs

Control Module Types (CMTs) do not consume any additional work memory or load memory on the SIMATIC S7 automation controller (CPU) compared to standard, manually created CFC charts. CMTs are an engineering-side (ES) architectural concept designed for modular standardization, bulk engineering, and automated synchronization. When a Control Module (CM) instance is generated, the CFC compiler generates standard function blocks (FBs) and instance data blocks (DBs) that execute identically to conventional CFC charts. However, upgrading from an older PCS 7 version to PCS 7 V9.0 will increase CPU memory consumption due to the expanded functional scope, additional feature bits, and larger instance data block footprints of newer Advanced Process Library (APL) blocks.

Table of Contents

Executive Summary

In modern process automation architectures, software standardization and lifecycle maintenance drive engineering efficiency. With the introduction of Control Module Types (CMTs) and Equipment Module Types (EMTs) in SIMATIC PCS 7, engineering workflows transitioned from copying individual CFC chart templates to instantiating centralized, version-controlled types. When planning system modernizations or migrating existing plants from classic CFC templates to CMTs, automation managers and lead engineers frequently express concern regarding hardware sizing: do CMTs consume more CPU work memory than standard CFCs, and will migrating to CMTs or updating to PCS 7 V9.0 force the procurement of larger or additional S7-400 CPUs?

This concern stems from a fundamental misunderstanding of the boundary between Engineering Station (ES) metadata and Automation Station (AS) runtime execution. CMT structural abstractions, variants, and optional blocks exist exclusively in the ES engineering database; the target S7 CPU executes only the compiled machine code and instance data blocks generated by the compiler. This technical guide explains the architectural compilation pipeline of CMTs, clarifies where memory consumption actually occurs, analyzes the true memory impact of upgrading to PCS 7 V9.0, and provides verified memory calculation formulas for S7-400 sizing.

Architecture and Fundamental Mechanics

The memory model of SIMATIC S7-400 controllers and the PCS 7 engineering compilation pipeline operate through distinct memory layers:
1. Engineering Station vs. Controller Runtime Scope:
* Control Module Type (CMT): A technological template stored in the Master Data Library (MDL) containing blocks, parameters, messages, and optional elements (variants).
* Control Module (CM): An instance created in the Plant Hierarchy. While the ES tracks technological interfaces and type-instance synchronization links, these metadata connections exist purely within the ES database (Component View / Plant View).
* AS Compilation: During CFC compilation (Chart > Compile), the compiler completely flattens the CMT abstraction. It generates standard S7 Organization Blocks (OBs), Function Blocks (FBs), Functions (FCs), and Data Blocks (DBs). To the S7 CPU runtime kernel, a compiled CM instance is indistinguishable from an identical chart created manually without CMTs.
* Memory Impact: Work memory consumption (code memory and data memory) and load memory consumption for a given set of blocks are 100% identical between CMT instances and conventional CFC charts.
2. The True Cause of Memory Growth: PCS 7 V9.0 APL Upgrades:
* When projects migrate to PCS 7 V9.0, engineers typically upgrade the underlying block libraries from legacy versions (e.g., PCS 7 Standard Library or early APL releases) to the latest APL V9.0.
* APL V9.0 blocks (such as MotL, VlvL, PIDConL) introduce substantial functional enhancements: new Feature and Feature2 bits, advanced operating modes, expanded maintenance states (MS), and additional interlock inputs (Permit, Protect).
* Each new input, output, and internal static variable enlarges the instance Data Block (DB) footprint. For example, an upgraded motor block instance DB may grow from 300 bytes to over 500 bytes. Across 500 motor and valve instances, this library expansion increases CPU data work memory consumption by hundreds of kilobytes, which can strain older, memory-constrained CPUs (such as CPU 414-4H or 416-2).

Step-by-Step Implementation Procedure

Step 1: Analyze Current CPU Memory Utilization in SIMATIC Manager

  1. Connect the Engineering Station to the target S7-400 / S7-400H controller online.
  2. In SIMATIC Manager, select the S7 Program or CPU object.
  3. Open PLC > Module Information.
  4. Navigate to the Memory tab:
    * Record RAM (Work Memory - Code): current size and percentage used.
    * Record RAM (Work Memory - Data): current size and percentage used.
    * Record Load Memory: current size and available free space.
  5. If current work memory utilization exceeds 75%, library upgrades must be planned carefully to prevent memory exhaustion.

Step 2: Implement CMT Standardization Without Hardware Memory Penalties

  1. In the Master Data Library, create or import your Control Module Types (e.g., CMT_Motor_Standard, CMT_Analog_Monitoring).
  2. Use optional elements and variants to consolidate multiple equipment variations into a single master type.
  3. In instances where optional blocks are deselected (disabled), the CFC compiler omits those blocks entirely from code generation, actually saving CPU work memory compared to bloated 'one-size-fits-all' standard templates.

Step 3: Quantify Memory Footprint When Upgrading to PCS 7 V9.0

  1. If upgrading from legacy libraries to APL V9.0, perform a test compile of a sample technological unit in an offline multiproject.
  2. Compare the compiled block sizes (FBs and instance DBs) in the offline Blocks folder between the legacy version and V9.0.
  3. Multiply the delta per typical by the total equipment instance count across the plant to estimate the required additional work memory.

Step 4: Optimize Run Sequences and Cyclic Interrupt Organization Blocks

  1. In the CFC editor, inspect the run sequence (Edit > Run Sequence).
  2. Distribute blocks rationally across cyclic interrupt OBs (e.g., place slow temperature loops in OB32 [1000 ms] or OB31 [2000 ms], reserving OB35 [100 ms] for high-speed interlocks and motors).
  3. Rational execution scheduling reduces CPU cycle overhead and communication buffer strain.

Step 5: Verify Load and Work Memory After Migration Download

  1. Perform a complete CFC compilation (Chart > Compile > Entire program).
  2. Download the user program to the AS controller.
  3. Re-open PLC > Module Information > Memory tab and confirm that work memory remains comfortably below 80% to allow for future online changes in RUN.

Verification

  1. In SIMATIC Manager, create a test CFC chart with a standard MotL and channel drivers manually.
  2. In the same project, instantiate an identical MotL from a Control Module Type (CMT).
  3. Compile the charts and inspect the generated instance DB sizes in the offline block container: confirm that both instance DBs have the exact same byte length.
  4. Open PLC > Module Information > Memory tab after downloading: confirm that work memory allocation corresponds strictly to block byte counts with zero overhead attributable to CMT metadata.
  5. Execute online changes (modifying a parameter in the CMT and synchronizing): confirm that memory increments only by the expected parameter modifications.

Limitations and Operational Precautions

  1. While CMTs do not consume extra AS CPU memory, they require sufficient Engineering Station (ES) disk space and database resources during bulk engineering.
  2. Upgrading to PCS 7 V9.0 will expand APL instance DB sizes; never upgrade libraries without verifying available CPU work memory beforehand.
  3. S7-400 CPUs have fixed physical work memory that cannot be expanded with standard memory cards (memory cards expand load memory only); if work memory is exhausted, CPU hardware must be upgraded.
  4. When modernizing to CPU 410-5H, Process Object capacity is governed dynamically by the System Expansion Card (SEC); confirm SEC capacity tiers and part numbers with an authorized Siemens distributor or the Siemens Industry Mall.

Engineer FAQ

Do CMTs require more CPU work memory than standard CFC charts?

No. CMTs are strictly an Engineering Station concept. The compiled machine code and instance data blocks loaded into the S7 CPU are identical in size to standard CFC charts.

Why did my CPU work memory increase after upgrading to PCS 7 V9.0?

The memory increase is caused by upgraded APL V9.0 library blocks, which feature new inputs, feature bits, and expanded instance DB structures, not by the use of CMTs.

Can I expand S7-400 work memory with a RAM memory card?

No. S7-400 memory cards expand Load Memory only (storing compiled code and DB initial values). Work Memory is permanently integrated into the CPU motherboard and cannot be expanded.

What is the maximum recommended CPU memory utilization in PCS 7?

Siemens recommends keeping both Code and Data Work Memory utilization below 75% to 80% during normal operation to guarantee sufficient headroom for online changes in RUN (CiR).

Do CMT optional blocks consume memory if they are not active in an instance?

No. In CMT instances where an optional block is deactivated, the CFC compiler does not generate the block or its instance DB, saving CPU memory.

Technical References

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Related Tags

  • CMT
  • Control Module Type
  • CPU Memory
  • S7-400
  • Work Memory
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