Extracting Half-Bytes (Nibbles) in SIMATIC PCS 7: Bitmasking and Shift Operations in STL, SCL, and CFC

To extract and evaluate the values of the two 4-bit half-bytes (nibbles) from a single 8-bit BYTE in SIMATIC PCS 7, use bitwise masking and shifting operations. In Statement List (STL), mask the lower nibble using word AND with 16#0F (AW W#16#000F). For the upper nibble, mask with 16#00F0 (AW W#16#00F0) and shift right by 4 bits (SRW 4). In Structured Control Language (SCL), use BYTE_TO_INT(InByte AND 16#0F) for the lower nibble and BYTE_TO_INT(SHR(IN := InByte, N := 4) AND 16#0F) for the upper nibble. This yields numeric values between 0 and 15 for each half-byte.

Data Representation: Bytes, Nibbles, and BCD Structures in STEP 7

In SIMATIC PCS 7 and STEP 7 programming, memory addressing is natively structured around 8-bit Bytes, 16-bit Words, and 32-bit Double Words. However, industrial automation protocols, fieldbus telemetry, and legacy hardware frequently pack distinct data values into half-bytes (also called nibbles, consisting of 4 bits each):

Binary Coded Decimal (BCD): A single byte encodes two decimal digits (0–9), with the tens digit in the upper nibble (Bits 4–7) and the units digit in the lower nibble (Bits 0–3).
Hardware Diagnostic Bytes: Multi-vendor sensors often pack operational mode into Bits 0–3 (values 0–15) and error status into Bits 4–7.

Because S7 instructions do not provide a native READ_NIBBLE command, programmers must apply boolean masking and bit shifts.

Extracting Nibbles in Statement List (STL / AWL)

In STL, the accumulator is used to mask unwanted bits and normalize the value:

// Extract Lower Nibble (Bits 0 to 3, Range 0 to 15)
L     #InputByte           // Load 8-bit input into ACCU 1
L     W#16#000F            // Load mask for lower 4 bits
AW                         // Bitwise AND word
T     #LowerNibble         // Store result (0 to 15)

// Extract Upper Nibble (Bits 4 to 7, Range 0 to 15)
L     #InputByte           // Load 8-bit input
L     W#16#00F0            // Load mask for upper 4 bits
AW                         // Bitwise AND word
SRW   4                    // Shift right by 4 bits to normalize to 0-15
T     #UpperNibble         // Store result (0 to 15)

Extracting Nibbles in Structured Control Language (SCL)

In SCL, the operation is expressed cleanly with strong data typing:

// Extraction of Lower and Upper Nibbles in SCL
Lower_Nibble := BYTE_TO_INT(In_Byte AND 16#0F);
Upper_Nibble := BYTE_TO_INT(SHR(IN := In_Byte, N := 4) AND 16#0F);

Shifting right by 4 positions (SHR) moves Bits 4–7 into Bits 0–3, eliminating the need for mathematical division and resulting in highly optimized machine code.

Implementing Nibble Extraction in Continuous Function Chart (CFC)

When working exclusively inside CFC without writing custom SCL/STL blocks:

Use the BITS_BY (Convert Byte to 8 Bits) block from the Standard Library (SIMATIC BCD / BIT_LGC).
This unpacks the byte into 8 discrete boolean outputs (Bit0 through Bit7).
To reconstruct integer nibbles, feed Bit0..Bit3 into a BY_BITS block (with higher bits tied to 0) or evaluate them using mathematical weighting: Lower_Val = Bit0*1 + Bit1*2 + Bit2*4 + Bit3*8.
While functional, packaging the logic into a reusable SCL block is significantly more efficient for CPU work memory and execution time.

Comparative Logic Matrix: STL vs SCL vs CFC Nibble Extraction

The following table compares performance and implementation characteristics across programming languages:

Programming EnvironmentExecution SpeedCPU Work Memory FootprintReadability & MaintainabilityRecommended ApplicationSTL (Statement List)Ultra-fast (Few machine cycles)Minimal (6 instructions)Moderate (Requires accumulator knowledge)High-speed cyclic interrupt routines (OB30-38)SCL (Structured Control)Fast (Compiled efficiently)Minimal (Standard SCL wrapper)Excellent (Direct algebraic syntax)Technological library function blocksCFC Standard BlocksModerate (Overhead of multiple blocks)Higher (Consumes block instances)Visual (Graphical interconnection)Quick commissioning when block authoring is restrictedBCD_TO_INT ConversionFast (Hardware instruction)MinimalN/A (Only valid for 0-9 digits)Strictly for BCD-formatted clock/thumbwheel inputs

Reusable SCL Function Block Implementation

The following SCL block SPLIT_BYTE provides an industrial-grade technological wrapper:

FUNCTION_BLOCK FB1516
TITLE = 'SPLIT_BYTE: Split Byte into Two 4-bit Nibbles'
VERSION : '1.0'
AUTHOR  : 'Authoring'
NAME    : 'SPLT_BY'
FAMILY  : 'CONVERT'

VAR_INPUT
    In_Byte : BYTE := 16#00;
END_VAR

VAR_OUTPUT
    Low_Nibble  : INT := 0; // Lower 4 bits (0-15)
    High_Nibble : INT := 0; // Upper 4 bits (0-15)
END_VAR

BEGIN
    Low_Nibble  := BYTE_TO_INT(In_Byte AND 16#0F);
    High_Nibble := BYTE_TO_INT(SHR(IN := In_Byte, N := 4) AND 16#0F);
END_FUNCTION_BLOCK

Verification

Verify mathematical accuracy through these boundary checks:

Input 16#00: Confirm Low_Nibble = 0 and High_Nibble = 0.
Input 16#FF: Confirm Low_Nibble = 15 and High_Nibble = 15.
Input 16#A5 (Binary 1010 0101): Confirm Low_Nibble = 5 and High_Nibble = 10.
Input 16#3C (Binary 0011 1100): Confirm Low_Nibble = 12 and High_Nibble = 3.

Limitations and Operational Precautions

Keep these programming considerations in mind:

BCD Decoding Hazards: If the byte represents BCD data (e.g. from an old hardware thumbwheel or S7 clock byte), values greater than 9 (hex A through F) represent corrupted or illegal digits. Implement a range check: if (Nibble > 9) then Fault := TRUE;.
Word Shift Padding: When using STL SRW, ensure that ACCU 1 high byte was zeroed during loading to avoid shifting unexpected upper bits into the result.
Commercial Accuracy Disclaimer: Software order numbers (MLFBs), package structures, and hardware capacity prerequisites vary across PCS 7 versions and hardware platforms. System integrators must confirm exact software entitlements and licensing requirements against the official Siemens Catalog CA 01 and obtain an authorized Siemens distributor quotation prior to purchasing.

Engineer FAQ

Why is SHR better than dividing by 16 in SCL?

Bit shift operations (SHR) compile into single-cycle bit-shift hardware instructions, whereas integer division consumes significantly more CPU execution cycles.

Can I use standard BCD conversion instructions to read nibbles?

Only if the values strictly represent valid decimal digits (0 to 9); standard BCD instructions will trigger a CPU programming error (OB121) if values between A and F are encountered.