How Configuration in RUN (CiR) Functions Across PROFINET and PROFIBUS DP in SIMATIC PCS 7

In SIMATIC PCS 7, modifying hardware without stopping the controller is governed by Configuration in RUN (CiR) on single controllers and H-CiR on fault-tolerant systems. On PROFIBUS DP, CiR has long allowed adding I/O slaves in RUN by pre-allocating CiR objects in HW Config. For PROFINET IO, legacy PCS 7 versions (prior to V8.1/V8.2) did not support CiR, requiring a CPU STOP to add devices. Modern PCS 7 systems utilizing CPU 410-5H controllers or redundant S7-400H pairs natively support PROFINET CiR/H-CiR, enabling online addition of ET 200M, ET 200SP HA, and field devices without stopping production.

Evolution of Configuration in RUN (CiR) in SIMATIC PCS 7

In continuous process industries—such as pharmaceuticals, chemicals, oil refining, and paper manufacturing—unscheduled plant shutdowns to add instrumentation or expand remote I/O drops cause catastrophic financial losses.

To eliminate shutdown requirements, Siemens introduced Configuration in RUN (CiR):
* CiR allows hardware modifications (adding/removing I/O modules, expanding fieldbus nodes, altering parameterization) to be compiled in HW Config and downloaded to the automation station while the CPU remains in RUN mode.
* In redundant architectures (S7-400H, CPU 410-5H), this mechanism is known as H-CiR, which coordinates failovers between master and standby CPUs to apply new hardware configurations bump-free.
* The capability of CiR depends strictly on three factors: the installed PCS 7 version, the CPU model and firmware release, and the underlying communication physical layer (PROFIBUS DP vs PROFINET IO).

PROFIBUS DP CiR Architecture and Pre-Allocated Objects

On PROFIBUS DP master systems, CiR has been a mature, proven technology since PCS 7 V5.x:

The CiR Object: In HW Config, an engineer inserts a special placeholder element named CiR into the PROFIBUS DP master line.
Guaranteed Memory Reservation: The CiR object reserves bus bandwidth, slave address slots, and internal CPU I/O process image memory.
Adding Modules in RUN: When a new ET 200M station or individual I/O card is needed:
1. Open HW Config and place the new module inside the reserved CiR boundary.
2. Select Station > Download to PLC in RUN....
3. The CPU accepts the configuration changes, initializes the newly connected hardware, and updates the process image without disturbing active control loops.
Bus Parameter Restrictions: The PROFIBUS baud rate, highest station address (HSA), and bus timing profiles (Ttr) cannot be modified during CiR; they remain locked to the initial configuration.

PROFINET IO CiR Capabilities: Legacy Restrictions vs Modern S7-410

The technical capability to perform CiR on PROFINET IO underwent major generational shifts:

Legacy PCS 7 (V7.0 through early V8.0):
* PROFINET IO did not support CiR on standard S7-400 controllers. Adding a new PROFINET IO device (such as an ET 200M PN interface module IM 153-4 PN) required a CPU STOP.
* If regular, on-the-fly hardware expansion was mandatory, Siemens officially recommended sticking with PROFIBUS DP.
Introduction of Redundant PROFINET (System Redundancy S2 / R1):
* True bumpless PROFINET reconfiguration in RUN requires devices that support PROFINET System Redundancy (S2 or R1), allowing an I/O device to maintain concurrent connections to both CPUs of an H-system.
Modern Era (PCS 7 V8.2, V9.0, V9.1 with CPU 410-5H):
* With the release of CPU 410-5H (firmware V8.1 and higher) and PCS 7 V8.2/V9.x, Siemens fully integrated CiR on PROFINET IO.
* Engineers can add new PROFINET devices (such as ET 200SP HA, Compact Field Unit CFU, and ET 200M) in RUN mode without pre-inserting artificial CiR objects.

Pre-Configuration Strategies to Minimize Production Downtime

If operating a legacy PCS 7 system where PROFINET CiR is unavailable, engineers use the Pre-Configuration Strategy to avoid future shutdowns:

Advance Hardware Planning:
* Estimate the maximum future plant expansion during initial design (e.g., reserving 4 future ET 200 remote I/O racks).
Configure Reserved Drops in HW Config:
* Place the future ET 200 stations and empty rack slots into the HW Config project during the planned commissioning outage.
* Assign device names, IP addresses, and diagnostic parameters in advance.
Deactivate Missing Stations in Software:
* In the AS program, call SFC12 (D_ACT_DP) during startup to deactivate the uninstalled ET 200 stations. This prevents the CPU from flooding the diagnostic buffer with station failure alarms (OB86).
Physical Expansion Without CPU Stop:
* When new process equipment arrives, physically mount and wire the new ET 200 rack.
* Call SFC12 with MODE = 1 to reactivate the station in software.
* The CPU begins cyclic polling immediately without requiring a hardware configuration download.

Comparison of CiR Support Across Fieldbus Technologies and CPU Generations

The table below outlines CiR and H-CiR capabilities across communication protocols and CPU hardware generations in SIMATIC PCS 7.

CPU GenerationPCS 7 VersionPROFIBUS DP CiRPROFINET IO CiRReconfiguration MechanismS7-400 V5.x (Standard)PCS 7 V7.0 - V7.1Yes (via CiR object)No (Requires CPU STOP)Single CPU CiR downloadS7-400H V4.5 (Redundant)PCS 7 V7.0 - V7.1Yes (via H-CiR)No (Requires CPU STOP)Redundant master/standby failoverS7-400H V6.0 (Redundant)PCS 7 V8.0 - V8.1Yes (via H-CiR)Limited (Firmware dependent)Redundant master/standby failoverCPU 410-5H (Firmware V8.2+)PCS 7 V8.2 - V9.1Yes (Native)Yes (Native PROFINET CiR)Dynamic bumpless memory updateCPU 410-5H RedundantPCS 7 V8.2 - V9.1Yes (Native H-CiR)Yes (PROFINET S2/R1 H-CiR)Redundant bumpless failover

Verification

To confirm that hardware changes were successfully applied in RUN mode:
1. In HW Config, select Station > Check Consistency. Verify that zero configuration errors exist.
2. Select PLC > Download to Module in RUN.... Confirm that the download dialog prompts for CiR execution without requesting a CPU transition to STOP.
3. Observe the CPU front panel: the RUN LED remains steady green, and no stop events appear in the diagnostic buffer (PLC > Module Information > Diagnostic Buffer).
4. Physically power on the new remote I/O node. Confirm that the bus fault (BF) and group fault (SF) LEDs on the new ET 200 interface module extinguish.
5. In CFC, interconnect process signals to the newly configured I/O addresses and execute an online Changes-Only download to verify live signal transmission.

Limitations and Operational Precautions

Never attempt a hardware download in RUN if the HW Config dialog displays a warning indicating that the CPU must enter STOP; always abort the download and investigate the conflicting hardware parameter.
Modifications to core CPU properties (such as changing cycle time limits, modifying local data allocation, or altering diagnostic interrupt assignments) cannot be performed via CiR and require a CPU stop.
On PROFINET IO networks, all switches and interface modules participating in H-CiR must support the required PROFINET system redundancy protocols (S2 or R1) and Media Redundancy Protocol (MRP).
Always back up the active PLC project from the controller before initiating any hardware download in RUN.

Engineer FAQ

What happens if a hardware download in RUN fails midway?

If a CiR download experiences a communication interruption, modern S7-400 and CPU 410 controllers reject the partial download and automatically roll back to the previously active hardware configuration, keeping the process online safely.

Can I change the IP address of a PROFINET controller using CiR?

No. Modifying the IP address or subnet mask of the CPU's integrated PROFINET interface disrupts active communication endpoints and cannot be performed in RUN; it requires a planned CPU restart.

Why does my CPU enter STOP when downloading a new ET 200 station?

The CPU enters STOP if the hardware configuration contains changes outside the permitted CiR boundaries (e.g., adding an unreserved slave without a CiR object on legacy PROFIBUS, or modifying core bus parameters). In addition, if organization blocks OB82, OB83, OB85, and OB86 are missing from the CPU, peripheral access faults will force the CPU into STOP.