How to Implement Bumpless Override Control with Dual PIDConL Loops and Opposing Gain Directions in PCS 7 APL

In SIMATIC PCS 7 APL, coordinating two PID controllers that share a single actuator—such as a common VFD pump regulating discharge density (positive gain) while constraining discharge flow (negative gain)—is implemented using the standard APL OverrideControl template. To achieve bumpless transfer between loops with opposing gain directions, configure the parameter NegGain on the negative-acting controller, route both controller outputs into a minimum selector (SelMin) or maximum selector, and feed the selected active output back into the inactive controller's tracking input (MV_Trk) with MV_TrkOn activated to prevent integrator windup.

Process Dynamics of Override (Selective) Control

In process engineering, situations frequently arise where a single physical manipulated variable (e.g., pump speed or control valve position) must be governed by two or more competing process objectives:
* Primary Objective: Control discharge slurry density to target setpoint (increasing pump speed increases throughput and density). Process gain is positive ($Gain > 0$).
* Constraint Objective: Prevent discharge flow from exceeding pipeline design velocity (if flow exceeds limit, pump speed must be reduced). Process gain relative to valve opening is negative ($Gain < 0$) or requires opposing corrective action.
* The Override Control Strategy: Both controllers calculate desired manipulated variables in parallel. A mathematical selection block (minimum selector SelMin or maximum selector SelMax) continuously selects whichever controller demands the more restrictive action, taking over control dynamically.

The APL OverrideControl Template Architecture

The SIMATIC PCS 7 Advanced Process Library provides a dedicated pre-engineered template named OverrideControl:

[Density PV] ---->+------------------+
[Density SP] ---->|     PIDConL      |---(MV1)---+
                  | (Density Loop)   |           |
                  | MV_TrkOn / MV_Trk|<----+     |
                  +------------------+     |     |
                                           |     v
                                        +------------+
                                        |   SelMin   |----(Selected MV)----> [VFD Speed Setpoint]
                                        +------------+
                                           ^     |
[Flow PV] ------->+------------------+     |     |
[Flow SP] ------->|     PIDConL      |---(MV2)---+
                  | (Flow Constraint)|           |
                  | NegGain = 1      |           |
                  | MV_TrkOn / MV_Trk|<----------+
                  +------------------+

PID1 (Density Controller): Primary loop operating with positive gain.
PID2 (Flow Controller): Constraint loop operating with negative gain.
SelMin (Minimum Selector): Compares MV1 and MV2 and routes the lower speed demand to the VFD.

Handling Opposing Gain Directions with NegGain

A common complication occurs when one loop has positive gain and the other has negative gain:
* Positive Gain ($Gain > 0$): As process variable (PV) drops below setpoint (SP), error is positive, and the controller increases output MV.
* Negative Gain ($Gain < 0$): As process variable exceeds setpoint, the controller must increase output, or vice-versa.
* In PIDConL, setting the parameter NegGain := 1 reverses the sign of the proportional gain calculation:
* When NegGain = 1, the controller internally multiplies the calculated error by $-1$.
* This allows both controllers to output standard positive percentage signals (0.0% to 100.0%) that can be evaluated directly by standard SelMin / SelMax blocks without requiring external sign-inversion blocks.

Achieving Bumpless Transfer via Manipulated Variable Tracking

The critical challenge in override control is preventing integrator windup on the inactive controller:
* If Controller 1 is currently in control and outputting 45%, Controller 2 will observe a persistent error.
* Without intervention, Controller 2's integrator would wind up to 100%.
* When process conditions suddenly require Controller 2 to take over, its output would start from 100%, causing an abrupt, dangerous speed surge.
* The Bumpless Tracking Solution:
1. Feed the actual selected output (SelMin.Out) back into the tracking input MV_Trk of both controllers.
2. Evaluate which controller is inactive: when MV1 > SelMin.Out, Controller 1 is unselected.
3. Activate MV_TrkOn := 1 on the inactive controller.
4. The inactive controller's internal integrator is continuously clamped to the active output.
5. When the transition occurs, both outputs are identical ($MV1 = MV2$), ensuring a 100% bump-free takeover.

Comparison of Standard PID vs Override Control Configurations

The table below compares single-loop control versus APL override control configurations.

Operational FeatureStandard Single-Loop PIDAPL Override Control TemplateControlled ActuatorSingle VFD / ValveSingle VFD / Valve shared by multiple loopsControlled VariablesSingle PVMultiple competing PVs (e.g., Density + Flow)Selection LogicNoneSelMin (Low-Select) or SelMax (High-Select)Integrator ManagementStandard anti-windupCross-tracking via MV_Trk to clamp inactive loopTransfer BehaviorN/ASeamless bumpless takeover across operating regimes

Verification

To confirm that bumpless override control operates properly:
1. In CFC test mode, simulate normal operating conditions where density is low: verify that Controller 1 demands 50% and Controller 2 demands 80%.
2. Confirm that SelMin selects 50% and routes it to the VFD.
3. Verify that Controller 2's tracking input clamps its internal state so its output rests ready at 50%.
4. Simulate a discharge flow surge exceeding the safety limit: verify that Controller 2 immediately takes over control smoothly from 50%, ramping output down to 35% without transient spikes.
5. In WinCC Runtime, open the faceplate: verify that the operator can view both loops and observe the active override status.

Limitations and Operational Precautions

Ensure both controllers execute within the same cyclic interrupt OB (e.g., OB35 @ 100ms) and share the same execution sequence to prevent single-cycle calculation delays in SelMin.
Verify that tracking inputs (MV_Trk) are bounded within legal range (0.0% to 100.0%); passing unscaled engineering units will corrupt controller setpoint tracking.
In manual mode, both controllers must be switched to manual or track the operator's manual output simultaneously to prevent windup during manual operations.
Never configure override loops without testing failure modes (such as sensor wire-break on either PV); if one sensor fails to Bad status, logic must force the selector to the healthy controller.

Engineer FAQ

What is the function of the NegGain parameter in PIDConL?

NegGain inverts the sign of the proportional gain calculation in PIDConL. This is used when an increase in the manipulated variable causes a decrease in the process variable, ensuring the controller responds in the correct corrective direction.

Why did the pump surge when the second PID took over?

The second PID experienced integrator windup while it was inactive. Because its integrator had accumulated to 100%, taking over control immediately commanded full speed. Implementing manipulated variable tracking (MV_TrkOn = 1 connected to the active output) eliminates this surge.