Implementing Dummy Steps and Dummy Bits in SIMATIC PCS 7 SFC and SFC Types

In SIMATIC PCS 7 SFC and SFC Types, 'Dummy Steps' and 'Dummy Bits' are structural programming techniques used to maintain sequence synchronization across parallel branches and manage hold/resume transitions. Simultaneous (parallel) branches in SFC require all parallel execution paths to begin and converge synchronously; inserting a dummy step (an empty step with no physical field actions) provides a neutral waiting state for branches that complete early. A dummy bit (an internal static flag evaluated in a transition) allows deterministic step advancement without waiting for physical field instrumentation.

Executive Summary

Sequential Function Charts (SFC and SFC Types) govern discontinuous state transitions and procedural sequences in SIMATIC PCS 7. A frequent structural challenge in complex sequence design occurs within simultaneous (parallel) branches and abnormal exception handling (Hold, Abort, Stop state logic). When one parallel branch completes its operational tasks faster than an adjacent branch, the finished branch must wait at a synchronization boundary without repeatedly pulsing commands to field equipment.

To resolve this, automation engineers employ 'Dummy Steps' and 'Dummy Bits'. A Dummy Step provides a passive waiting state where no equipment actions are asserted, preventing duplicate commands while awaiting parallel branch convergence. A Dummy Bit acts as an internal flag or virtual handshake, enabling conditional transitions or controlled manual advances. This guide explains the algorithmic execution of SFC simultaneous branches and details the exact implementation of dummy structures in PCS 7 V8.0 through V9.1.

Architecture and Fundamental Mechanics

The execution model of SIMATIC PCS 7 SFC complies with IEC 61131-3 and ISA-88 standards:

Simultaneous Branch Convergence Rules: In SFC topology, a simultaneous branch (represented by double horizontal lines) splits execution into two or more concurrent branches. IEC rules mandate that ALL concurrent branches must satisfy their respective final transition conditions before the sequence can cross the convergence bar into the subsequent common step. If Branch A finishes in 5 seconds while Branch B requires 60 seconds, Branch A cannot proceed independently.
The Danger of Action Repetition Without Dummy Steps: If Branch A remains in its final active step (e.g., Step_Dose_Additive) while waiting for Branch B, the step's 'Processing' actions execute cyclically on every OB scan. If the step contains dynamic pulses or incremental counters, unintentional multiple dosing or command chatter will occur. Placing an unassigned 'Dummy Step' (e.g., Step_Wait_Sync) at the end of Branch A provides a clean holding state where no actions execute.
Dummy Bits for Controlled Transitions: A transition condition in SFC evaluates boolean logic. While standard transitions inspect field feedbacks (MotL.FbkRun.Value = 1, Lvl_High.Value = 1), certain architectural workflows require stepping based on internal logic states, manual operator bypasses, or hold-recovery sequencing. A Dummy Bit (an internal static variable defined under SFC Type characteristics or a CFC flag) provides a programmable gate: setting Dummy_Bit := TRUE allows the transition to fire instantly (Transition: Dummy_Bit = TRUE), while holding it FALSE blocks progression regardless of physical instrument states.

Step-by-Step Implementation Procedure

Follow these steps to configure dummy steps and dummy bits in PCS 7 SFC and SFC Types:

Create a Dummy Bit in SFC Type Characteristics:
- In SIMATIC Manager, open the SFC Type in the SFC Editor.
- In the navigation tree, expand 'Characteristics' > right-click 'Bit Memory' (or 'Internal Variables') > select 'Insert Object'.
- Name the variable (e.g., Dummy_Sync_Bit or Flag_Branch_Done).
- Set the Data Type to BOOL and initial value to FALSE.
- Save the SFC Type.
Insert a Dummy Step in Parallel Branches:
- Open the SFC chart or SFC Type topology view.
- Locate your simultaneous branch structure (split bar with two or more paths).
- At the terminus of the faster branch, insert a new Step immediately before the bottom convergence bar.
- Name the step Dummy_Wait_Branch1.
- Open the Object Properties of Dummy_Wait_Branch1:
- Leave the 'Initialization', 'Processing', and 'Termination' tabs completely empty (or assign an informational status text: 'Waiting for parallel branch to complete').
Configure the Preceding Transition to Enter the Dummy Step:
- Configure the transition preceding Dummy_Wait_Branch1 to evaluate the physical completion of the work (e.g., Dosing_Valve.FbkClosed.Value = 1 AND Dose_Meter.Done = 1).
- When these conditions are met, the sequence leaves the active dosing step and enters Dummy_Wait_Branch1.
Use the Dummy Bit for Convergence or Resume Control:
- In the step actions of the parallel branches, set the dummy flag when each respective task completes (e.g., in Termination: Flag_Branch1_Done := TRUE).
- In the transition immediately following the convergence bar, evaluate the convergence conditions:
Transition_All_Done: Flag_Branch1_Done = TRUE AND Flag_Branch2_Done = TRUE
- In the step following the convergence, reset both dummy bits to FALSE in the 'Initialization' tab.
Implement Dummy Steps for Hold/Resume Parking:
- When designing the 'Holding' and 'Resuming' sequencer state logic, insert a Dummy Step named Step_Hold_Park.
- If an emergency hold occurs, transition the sequence into Step_Hold_Park where all actuator outputs are safely de-energized.
- Upon resume, transition from Step_Hold_Park back into the appropriate operational step without executing corrupt restart pulses.

Verification

In the CFC Editor, compile the charts and download to the CPU (or test in S7-PLCSIM).
Switch SFC into Test Mode (Online).
Trigger execution of the simultaneous branch: verify that the faster branch executes its operational step, closes its valves, and enters the dummy step Dummy_Wait_Branch1.
Confirm that while waiting in Dummy_Wait_Branch1, zero command pulses are issued to field equipment.
Allow the slower branch to finish: confirm that as soon as the slower branch finishes, the sequence crosses the bottom convergence bar cleanly.
Confirm that dummy bits reset to FALSE in the subsequent step.

Limitations and Operational Precautions

Do not leave dummy steps with unassigned transitions, as an empty transition defaults to TRUE and will advance immediately on the next CPU cycle. In safety-instrumented systems (SIS) or fail-safe CFC charts, dummy bits must not be used to bypass physical safety interlocks. Always verify sequence timing and engineering software licenses through an authorized Siemens distributor or the Siemens Industry Mall.

Engineer FAQ

Why is an empty step called a 'Dummy Step'?

It is termed a dummy step because it performs no physical process control or actuator manipulation; its sole purpose is satisfying the structural topological requirements of the SFC execution engine.

What happens if a transition has no conditions configured?

An empty transition in PCS 7 SFC evaluates automatically as TRUE (logic 1). The SFC sequencer will pass through it in a single CPU execution scan.

Can I use Step Time (TI) in a dummy step transition?

Yes. A common pattern is configuring the transition after a dummy step as Dummy_Step.TI >= T#2s to introduce a brief, deterministic settling delay before proceeding.

Where is Bit Memory stored in an SFC Type?

Bit Memory variables are stored as internal static tags within the SFC Type's instance Data Block (DB) and retain their values across execution cycles.