C135 PCS 7 (PCS7)
6C
6 Cielo Ciencia y Tecnología
·Publicada en C135 PCS 7 (PCS7)

Increasing Communication Load Percentage for AS-Wide Interconnections in PCS 7

Increasing Communication Load Percentage for AS-Wide Interconnections in PCS 7

To resolve the 'Overload sender: sender AS cannot send more data (exceeded communication capacity)' error caused by heavy AS-wide cross-controller data exchange in a PCS 7 multiproject, increase the communication cycle load allocation in the CPU hardware configuration. In HW Config, double-click the CPU module to open Object Properties, select the 'Cycle/Clock Memory' tab, and increase the parameter 'Scan cycle load from communication [%]' from its default (typically 20% or 30%) to a higher value, such as 40% or 50%. This allocates a greater CPU execution time budget per cycle to processing S7 communication buffers and AS-wide driver tasks. Afterward, save and compile HW Config and download the modified configuration to the controller.

Table of Contents

Executive Summary

In complex, multi-unit chemical plants and refineries automated with SIMATIC PCS 7, distributed controllers frequently exchange real-time interlock signals, unit coordination states, and analog measurements across the Industrial Ethernet plant bus using AS-wide cross-couplings. When the volume of exchanged data or the frequency of cross-chart interconnections exceeds configured thresholds, the PCS 7 chart compiler or runtime diagnostics flag the error 'Overload sender: sender AS cannot send more data'. This occurs because the CPU's default communication time budget (governed by the 'Scan cycle load from communication' parameter) is saturated. This technical reference explains the communication scheduling mechanics of S7-400 and CPU 410-5H controllers and details how to optimize communication load settings without compromising real-time control.

Architecture and Fundamental Mechanics

AS-Wide Communication and CPU Cycle Scheduling Mechanics

+-------------------------------------------------------------------------+
|                   S7-400 / CPU 410-5H Execution Cycle                   |
+-------------------------------------------------------------------------+
                                    |
   +--------------------------------+--------------------------------+   |
   | OB35 / Cyclic Interrupts       | Free-Running Cycle (OB1)       |   |
   | - Closed-loop PIDs, Drivers    | - User background logic        |   |
   | - Fixed 100 ms execution tick  | - System diagnostics           |   |
   +--------------------------------+--------------------------------+   |
                                    |
                                    v
+-------------------------------------------------------------------------+
|               Communication Processing Budget Slice                     |
|                                                                         |
|   Parameter: 'Scan cycle load from communication [%]'                   |
|   - Default: 20% to 30%                                                 |
|   - Increased: Up to 50%                                                |
|                                                                         |
|   Functions Serviced in this Budget:                                    |
|   1. AS-Wide Interconnections (@AS-Wide BSEND / BRECV buffers)          |
|   2. WinCC OS Server Tag Polling and Alarm Logging                      |
|   3. Engineering Station Delta Downloads and Online Monitoring          |
+-------------------------------------------------------------------------+

Why the 'Overload Sender' Error Occurs

  1. Data Packet Sizing and Buffer Limits: AS-wide interconnections automatically instantiate system blocks (@AS-Wide, using SFB12 BSEND and SFB13 BRECV). Each cross-connection consumes communication buffers on the CPU and communication processor (CP 443-1 / PN interface).
  2. Time Budget Throttling: The CPU operating system limits communication processing to a percentage of total scan time to ensure that OB1 and background services are not starved. If incoming/outgoing AS-wide packets cannot be dispatched within the assigned slice, the sender buffer overflows, triggering the 'Overload sender' compile/runtime diagnostic.

Step-by-Step Implementation Procedure

Step 1: Access CPU Hardware Properties in HW Config

  1. In SIMATIC Manager, open the Hardware configuration editor for the sending AS station.
  2. In the controller rack (Rack 0 for single station or both racks in redundant S7-400H), double-click the CPU module (CPU 410-5H or CPU 416-3 / 417-4) to open Object Properties.
  3. Navigate to the tab Cycle/Clock Memory.

Step 2: Adjust Scan Cycle Load from Communication

  1. Locate the input field Scan cycle load from communication [%] (or Zyklusbelastung durch Kommunikation [%]).
  2. Note the existing setting (typically 20% or 30%).
  3. Increase the parameter value:
    - Set to 40% for moderately loaded controllers.
    - Set to a maximum of 50% if cross-controller interconnections are extensive.
  4. Click OK to close Object Properties.

Step 3: Optimize AS-Wide Interconnection Settings in CFC

  1. In the CFC editor, select Options > Customize > Compilation/Download....
  2. In the AS-Wide Interconnections section, review the configured transmission cycle and buffer allocation.
  3. Group individual signals into structured words or DWORDs where feasible rather than sending hundreds of individual boolean cross-connections, significantly reducing packet overhead.

Step 4: Save, Compile, and Download HW Config

  1. In HW Config, execute Station > Save and Compile.
  2. Download the updated hardware configuration to the AS:
    - In standalone controllers, download during a scheduled maintenance window.
    - In redundant S7-400H / CPU 410-5H systems, execute the download online in RUN via the standard H-CiR (Hardware Configuration in RUN) procedure.
  3. Recompile the CFC charts: Chart > Compile > Changes Only.
  4. Confirm that the 'Overload sender' compiler error clears completely.

Verification

  1. Compiler Output Check: Perform a full or changes compilation of the CFC charts in SIMATIC Manager. Verify that the compilation summary reports zero 'Overload sender' errors.
  2. CPU Communication Diagnostics: In SIMATIC Manager, select the CPU and press Ctrl+D to open Module Information. Open the Performance Data and Communication tabs. Verify that communication resources and connection usage remain well within allowable limits.
  3. Signal Transmission Latency: Go online in CFC charts on both sending and receiving controllers. Toggle a cross-connected signal and verify that the receiver updates reliably within the expected transmission cycle.

Limitations and Operational Precautions

  1. OB1 Scan Time Extension: Setting communication load higher than 50% can prolong the OB1 cycle time. In PCS 7, critical control executes deterministically in OB35 (which preempts communication), but background tasks and diagnostic logging may experience latency.
  2. CP Connection Limits: Increasing cycle load does not bypass physical hardware connection limits (e.g., maximum S7 connections on a CP 443-1 or CPU 410 onboard PN ports). Verify total connection counts in NetPro.

Engineer FAQ

Where is the communication load parameter located?

In HW Config, open CPU Properties and navigate to the 'Cycle/Clock Memory' tab.

What does 'Scan cycle load from communication' control?

It defines the maximum percentage of CPU execution time allocated to servicing communication tasks per scan cycle.

What is the recommended maximum percentage?

Between 40% and 50%. Setting it above 50% can severely extend the OB1 background cycle time.

Will increasing communication load affect OB35 PID loops?

No. Cyclic interrupt OBs (OB35, OB32) run at higher hardware interrupt priority and preempt communication processing.

Why did the compiler report 'Overload sender'?

The volume of AS-wide cross-connection data exceeded the maximum communication throughput allowed by the configured communication time slice.

Can I optimize AS-wide data transfer without changing CPU settings?

Yes, bundle multiple digital signals into DWORDs using bit-packing blocks before sending across controllers to minimize communication packets.

Can HW Config changes be downloaded in RUN on CPU 410-5H?

Yes, redundant CPU 410-5H systems support loading updated cycle load parameters online in RUN using H-CiR.

Does AS-wide communication use S7 connections in NetPro?

Yes, AS-wide interconnections automatically establish and utilize configured S7 connections between controller stations.

What system blocks execute AS-wide transfers?

System function blocks SFB12 (BSEND) and SFB13 (BRECV) wrapped inside the system chart @AS-Wide.

Does increasing this parameter require extra software licenses?

No, adjusting CPU communication load is a standard engineering parameter requiring no additional licenses.

Technical References

Related Articles

Related Tags

  • AS-Wide Interconnection
  • Communication Load
  • CPU 410-5H
  • HW Config
  • Cycle Clock Memory
  • Overload Sender
  • S7 Communication
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