Interconnecting APL Channel Drivers (Pcs7AnIn, Pcs7DiIn, Pcs7AnOu) with Monitoring Blocks and Field Diagnostics

Interconnecting APL Channel Drivers (Pcs7AnIn, Pcs7DiIn, Pcs7AnOu) with Monitoring Blocks and Field Diagnostics

In SIMATIC PCS 7 Advanced Process Library (APL), channel driver blocks (such as Pcs7AnIn FB1869, Pcs7DiIn FB1871, and Pcs7AnOu FB1870) serve as the hardware abstraction layer and do not feature WinCC block icons or operator faceplates. To visualize values, generate alarms, and manipulate setpoints on the OS, channel drivers must be interconnected to technological blocks: Pcs7AnIn.PV_Out connects to MonAnL.PV (or MonAnS), Pcs7DiIn.PV_Out connects to MonDiL.In (or MonDiS), and OpAnL.SP_Out connects to Pcs7AnOu.PV_In. Channel drivers automatically acquire hardware diagnostic quality (Good, Bad, Simulated) from the module driver generator, which propagates through output signal structures to display diagnostic badges and alarms on the monitoring faceplates.

Table of Contents

Executive Summary

When developing automation applications with SIMATIC PCS 7 V9.0 SP2 and modern distributed I/O systems like ET 200SP HA, control engineers frequently inquire about the relationship between signal channel drivers and operator monitoring blocks. A common misconception is expecting channel driver blocks (such as Pcs7AnIn or Pcs7DiIn) to provide native WinCC block icons and faceplates. In the APL architectural philosophy, signal acquisition is strictly separated from technological processing and human-machine interaction. This guide details the mandatory block interconnections, explains how diagnostic statuses propagate from hardware to faceplates, and outlines signal scaling configurations.

Architecture and Fundamental Mechanics

The SIMATIC PCS 7 APL architecture organizes signal processing into a two-tier hierarchy:
1. Channel Driver Tier (Signal Conditioning & Hardware Abstraction):
- Pcs7AnIn (FB1869) reads raw peripheral words (PEW) from analog input modules, applies NAMUR filtering, converts raw counts (0..27648) to engineering units using Scale parameters, and packages the result into a structured output PV_Out (containing Value REAL and ST BYTE quality code).
- Pcs7DiIn (FB1871) acquires discrete field inputs and provides structured output PV_Out (containing Value BOOL and ST BYTE).
- Pcs7AnOu (FB1870) receives engineering unit setpoints, clamps output limits, and writes converted digital words (PAW) to analog output cards.
- Crucially, channel drivers do NOT possess Operator Control and Monitoring (OCM) attributes; they generate no WinCC tags, block icons, or faceplates.

  1. Technological & Monitoring Tier (Control & Visualization):
    - MonAnL (FB1845) evaluates analog limits (High/Low Warning, High/Low Alarm), deadbands, and generates WinCC alarms via ALARM_8P. It links directly to WinCC block icon @MonAnL/1 and faceplate @pg_MonAnL_Standard.pdl.
    - MonDiL (FB1848) monitors discrete process conditions, applies flutter suppression, and displays digital status icons.
    - OpAnL (FB1865) provides operator manual setpoint input and ramp generators.

Hardware diagnostics generated by ET 200SP HA (wire break, short circuit, module failure) are captured by system diagnostic blocks (MOD_HA, OB_DIAG1) generated during CFC compilation. These blocks dynamically update the channel driver's signal status (ST). When ST degrades to Bad (16#00 or 16#28), MonAnL immediately reflects this with a maintenance badge on the HMI.

Step-by-Step Implementation Procedure

  1. Configure Hardware and Channel Scaling:
    a. In HW Config, insert the ET 200SP HA analog input module and configure channel measurement types (e.g., 4..20 mA 2-wire).
    b. Note the starting peripheral input address (e.g., PIW 512).

  2. Instantiate Channel Driver and Monitoring Blocks in CFC:
    a. Open the target CFC chart in the Plant Hierarchy.
    b. From the APL library catalog, drag Pcs7AnIn (FB1869) and MonAnL (FB1845) into the chart.
    c. At Pcs7AnIn, connect input PV_In to the hardware address PIW 512 (or symbolic name from the Symbol Table).
    d. Configure Pcs7AnIn.Scale structure: set Scale.Low to minimum engineering value (e.g., 0.0) and Scale.High to maximum value (e.g., 100.0). Set PV_InUnit (e.g., 1001 for % or 1010 for bar).

  3. Interconnect Channel Output to Monitoring Block:
    a. Connect Pcs7AnIn.PV_Out directly to MonAnL.PV.
    b. The structured interconnection automatically transfers both the analog measurement (PV_Out.Value) and the signal status byte (PV_Out.ST).
    c. Connect MonAnL.Scale to match Pcs7AnIn.Scale (or use text-based block connections).

  4. Configure Digital Monitoring and Analog Output Patterns:
    a. For digital signals: Connect Pcs7DiIn.PV_Out directly to MonDiL.In.
    b. For analog control/outputs: Connect OpAnL.SP_Out directly to Pcs7AnOu.PV_In, and connect Pcs7AnOu.PV_Out to PQW 512.

  5. Compile CFC Charts with Module Driver Generation:
    a. Execute Chart -> Compile -> Chart as Program....
    b. Ensure 'Generate module drivers' is checked.
    c. The compiler automatically instantiates MOD_HA diagnostic blocks and wires them to Pcs7AnIn inputs Mode, DataXchg, and MS.
    d. Compile the OS project and verify block icons appear in process graphics.

Verification

  1. In CFC test mode, monitor Pcs7AnIn: verify that applying a 12 mA signal to the field terminal renders 50.0 at PV_Out.Value with signal status ST = 16#80 (Good).
  2. Verify that MonAnL.PV receives 50.0 and displays normal operating conditions without alarms.
  3. Disconnect the field wire to simulate a wire break: verify Pcs7AnIn.PV_Out.ST changes to 16#00 or 16#28 (Bad), and MonAnL asserts a quality alarm and displays the wrench/bad quality badge on the WinCC faceplate.
  4. Check WinCC AlarmControl: confirm the channel diagnostic event is logged in the alarm list with correct device attribution.

Limitations and Operational Precautions

Directly connecting hardware peripheral addresses (e.g., PIW 512) to MonAnL.PV without an intermediate channel driver (Pcs7AnIn) bypasses signal status evaluation and breaks automated module driver diagnostic generation. In safety-related applications, standard APL channel drivers must not be used; instead, employ F-Channel drivers from the S7 F Systems library (F_CH_AI, F_CH_DI).

Engineer FAQ

Why doesn't Pcs7AnIn appear in WinCC after OS compilation?

Channel driver blocks do not have OCM (Operator Control and Monitoring) attributes and do not generate WinCC tags or icons; only technological blocks like MonAnL create HMI representations.

What does the signal status byte (ST) communicate?

The signal status byte conveys IEEE-standard NAMUR status information: 16#80 = Good, 16#60 = Simulated, 16#28 = Bad device related, 16#00 = Bad unspecific / wire break.

What is the difference between MonAnL and MonAnS?

MonAnL is the standard Large monitoring block featuring full limit monitoring, hysteresis, and archiving. MonAnS is the Small variant optimized to conserve AS memory and CPU cycle time by omitting secondary limits.

Do I need to manually scale the raw 0..27648 value in logic?

No. The Pcs7AnIn block internally converts the 0..27648 S7 integer count into engineering units based on the configured Scale.Low and Scale.High values.

How do I simulate an analog input value for testing?

Set Pcs7AnIn.SimOn = 1 and provide the desired test value at Pcs7AnIn.SimPV_In; the block outputs the simulated value with ST = 16#60, illuminating a yellow hand icon on the faceplate.

Technical References

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Related Tags

  • Pcs7AnIn
  • MonAnL
  • APL Channel Drivers
  • ET 200SP HA
  • Module Drivers
  • Signal Status
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