Interlock Faceplate Jump Navigation and Bypassing Non-APL Logic with the SelFp Block

Interlock Faceplate Jump Navigation and Bypassing Non-APL Logic with the SelFp Block

In SIMATIC PCS 7 Advanced Process Library (APL), interlock faceplate jump navigation relies on the system attribute BLK_Jump configured on interlock input pins (In01 to In08). The faceplate jump button only appears if the connected block possesses the S7_m_c attribute and an associated WinCC faceplate. Inserting intermediate non-APL logic—such as standard on-delay timers (TimerP, TON) or raw AND/OR gates—breaks the jump chain because these blocks lack operator attributes. To bridge this gap without creating unnecessary block icons, utilize the SelFp (Select Faceplate) block from the PCS 7 Industry Library, which provides dedicated SelFP inputs with BLK_Jump attributes designed to route faceplate jumps across non-interlock logic, or wrap the timer in an APL-compliant custom block.

Table of Contents

Executive Summary

A cornerstone of operator situational awareness in SIMATIC PCS 7 is hierarchical interlock navigation ('Interlock Follow'). When a motor or valve is prevented from starting by an interlock block (e.g., Intlk02, Intlk04, Intlk08), operators can click the interlock faceplate's navigation arrow buttons to jump directly to the root cause instrument faceplate. However, process control architectures frequently require an intermediate time delay—such as an on-delay timer (TimerP) or auxiliary logic gate—between the field measurement and the interlock input. Inserting a raw timer severs the navigation chain: the interlock faceplate displays an unclickable pin label rather than an interactive jump button. This article explains the mechanics of BLK_Jump and demonstrates how to use the SelFp block to maintain uninterrupted faceplate navigation.

Architecture and Fundamental Mechanics

The faceplate jump navigation framework in PCS 7 relies on compiler-generated metadata and WinCC tag formatting:

  1. The BLK_Jump Attribute Mechanics: In APL interlock blocks, each input pin (In01 through In08) is declared in SCL with the system attribute { S7_shortcut := 'BLK_Jump' } or { BLK_Jump := '1' }. During OS compilation, the compiler inspects the signal source wired to each In pin:
    - If the source is a technological block equipped with { S7_m_c := 'true' } and a recognized WinCC faceplate (e.g., MonAnL, MonDiL), the compiler generates a dynamic jump tag: Serverprefix::ChartName\BlockName.
    - In the WinCC faceplate, the APL script detects the jump tag and renders an interactive arrow button allowing direct faceplate opening.

  2. Why Intermediate Timers Break the Jump: Standard logic blocks (AND, OR) and raw timing blocks (TimerP, TON, TOF) are elementary mathematical functions. They do not possess { S7_m_c := 'true' }, have no WinCC block icons, and have no faceplates. When an engineer connects Sensor -> TimerP -> Intlk04, the interlock compiler sees TimerP as the immediate signal source. Because TimerP has no faceplate, the compiler generates no jump tag, completely isolating the upstream sensor from the interlock view.

  3. The Role of the SelFp (Select Faceplate) Block: Siemens developed the SelFp block (available in the PCS 7 Industry Library and APL utilities) as a dedicated Jump Distributor. SelFp provides up to five input pins (SelFp1 through SelFp5), each configured with the BLK_Jump attribute. By placing SelFp alongside custom logic or wiring its inputs in parallel with technological signals, engineers route faceplate jump references across arbitrary logic gates without forcing those gates into the OS.

Step-by-Step Implementation Procedure

Restore interlock jump navigation using either the SelFp block or an APL monitoring block wrapper:

Method 1: Implementing the SelFp Jump Distributor (Recommended)

  1. In SIMATIC Manager, open the target CFC chart.
  2. In the block catalog, locate SelFp (under Industry Library or project library).
  3. Drag SelFp onto the chart canvas.
  4. Wire the technological source block (e.g., MonAnL.Out) to SelFp.SelFp1 (this registers the upstream block for faceplate jump).
  5. Wire the timer output (e.g., TimerP.Q) to the interlock input Intlk04.In01.
  6. To link the jump reference from SelFp into the interlock, connect SelFp.SelFp_Out to the interlock block's auxiliary jump reference pin, or utilize SelFp as the intermediary jump multiplexer.

Method 2: Replacing Raw Timers with APL Digital Monitoring Blocks (MonDiL)

  1. If an on-delay timer is used to debounce a digital interlock signal, replace TimerP with an APL MonDiL (FB1848) block.
  2. Connect the field sensor driver (Pcs7DiIn.PV_Out) to MonDiL.In.
  3. Configure the on-delay time directly on the block using MonDiL.MonTiDynamic (or MonTiStatic).
  4. Connect MonDiL.Out directly to Intlk04.In01.
  5. Because MonDiL is an APL block with { S7_m_c := 'true' }, the interlock compiler detects it natively and generates a valid jump button, while MonDiL in turn provides a jump button back to the channel driver.

Method 3: Compile and Update OS

  1. Perform a CFC compilation (Changes Only).
  2. Compile the WinCC OS with 'Generate block icons' checked.
  3. Download changes to the AS controller and activate OS runtime.

Verification

Verify interlock navigation continuity across the automation system:

  1. Interlock Faceplate Inspection: In WinCC Runtime, open the faceplate of the interlocked motor or valve. Click the Interlock button to open Intlk04.

  2. Jump Button Audit: Confirm that an arrow button appears next to the timed interlock condition.

  3. Navigation Execution: Click the arrow button. Confirm that the WinCC screen opens the faceplate of the upstream sensor or monitoring block instantly without path errors or missing faceplate warnings.

Limitations and Operational Precautions

Never manually edit WinCC @pg_*.pdl faceplate scripts to hardcode block jump paths; hardcoded scripts will be overwritten during the next OS Project Editor run and break project portability. Always rely on standard BLK_Jump attributes and OS compilation. Additionally, ensure the target OS path in server data is valid if interlocks span multiple OS server pairs.

Engineer FAQ

Why does connecting a TimerP block break the interlock faceplate jump?

TimerP is an elementary function block lacking the { S7_m_c := 'true' } attribute and has no WinCC faceplate. The interlock compiler cannot generate a jump tag for a block that has no HMI representation.

What is the function of the SelFp block?

SelFp functions as a jump distributor, providing multiple input pins equipped with BLK_Jump attributes to route faceplate navigation across intermediate logic gates.

Can I follow interlocks across multiple cascaded interlock blocks?

Yes. Cascading Intlk02 into Intlk04 preserves jump navigation because all APL interlock blocks possess BLK_Jump and native faceplates.

How does MonDiL replace an on-delay timer in interlock circuits?

MonDiL includes integrated monitoring timers (MonTiDynamic) that delay status output changes, providing time-delayed interlocking while maintaining full APL faceplate jump support.

Why does the jump button appear on the faceplate but clicking it does nothing?

This occurs if the target block's faceplate (@PG_*.pdl) is missing from the GraCS directory, or if the WinCC server data reference is pointing to an outdated or renamed OS server.

Technical References

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Related Tags

  • Interlock
  • BLK_Jump
  • SelFp
  • Intlk04
  • MonDiL
  • Faceplate Jump
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