Internal Reset Mechanism of Boolean Input Parameters in SIMATIC PCS 7 APL Blocks

In SIMATIC PCS 7 Advanced Process Library (APL), boolean input parameters—such as operator commands (RstOp, StartOp, StopOp)—can be reset to FALSE internally by the block itself because STEP 7 Function Blocks (FBs) store VAR_INPUT parameters in read/write Instance Data Blocks (DBs). While classic IEC 61131-3 theory treats inputs as read-only, S7-400 architecture permits internal SCL code to write to its own input addresses. APL utilizes this mechanism for WinCC operator commands: when an operator clicks 'Reset' on a faceplate, WinCC writes TRUE (1) to RstOp; during the next cyclic execution OB, the block executes the reset algorithm and immediately clears RstOp to FALSE (0), eliminating the need for WinCC to execute a separate reset handshake.

STEP 7 Memory Model and SCL Input Variable Mutability

Engineers transitioning from other PLC platforms (such as Rockwell ControlLogix or IEC 61131-3 pure functional environments) frequently assume that a Function Block input (VAR_INPUT) is strictly immutable from within the block's internal algorithm, and that bidirectional modification demands an in-out parameter (VAR_IN_OUT).

In SIMATIC STEP 7 and PCS 7, however, the execution memory model operates differently:

Variable DeclarationPhysical Memory LocationInternal SCL Read AccessInternal SCL Write AccessOverwritten Cyclically by CFC?VAR_INPUT (Unconnected)Instance DB byte offsetYesYes (Permitted in S7/SCL)No (Retains internal value)VAR_INPUT (Interconnected)Instance DB byte offsetYesYes (Overwritten next cycle)Yes (Predecessor block overwrites)VAR_OUTPUTInstance DB byte offsetYesYesNo (Block is the writer)VAR_IN_OUTPointer to external DB/memoryYesYesPassed by reference

Because an unconnected VAR_INPUT occupies standard read/write RAM within the block's Instance DB, SCL code can execute RstOp := FALSE; at the end of its execution block, modifying the input value directly.

APL Interface Design: Operator Inputs (Op) vs Interconnected Signals (Li)

The Advanced Process Library categorizes block interfaces into distinct operational groups based on data structures and caller authority:

Operator Control Inputs (*Op): Standard elemental data types (BOOL, REAL). Examples include RstOp, ManOp, AutoOp, SP_IntOp. These inputs are exposed to WinCC OS faceplates. Because they are designed for momentary operator clicks, the APL block automatically resets boolean operator commands to 0 once processed.
Linked / Interconnected Inputs (*Li / *Aut): Structured data types (STRUCT) containing two elements:
1. Value: The process data (BOOL or REAL).
2. ST: The NAMUR NE 107 Signal Status (BYTE), indicating Good (16#80), Bad (16#00), or Simulated (16#60).
These signals originate from other CFC blocks and are overwritten continuously on every OB execution cycle; therefore, internal resets are not applied to linked inputs.

How Internal Input Resets Prevent 'Sticky' WinCC Operator Commands

In distributed supervisory control systems, network latency across the Terminal Bus presents operational hazards. In legacy systems without internal resets, triggering a motor start required a dual-telegram handshake:

WinCC script writes Start = 1 on mouse down.
WinCC script writes Start = 0 on mouse up.

If the operator released the mouse while network communication glitched, or if the client crashed mid-click, the start command remained permanently stuck at 1 ('sticky bit'), preventing future stops or causing unexpected restarts.

APL's internal reset architecture completely eliminates sticky bits:

[Operator Clicks Reset on Faceplate]
               │
               ▼
WinCC writes RstOp = TRUE (Single Telegram)
               │
               ▼
[AS Cyclic OB Execution (e.g. OB35 100ms)]
  1. Block evaluates: IF RstOp THEN ClearFaults(); END_IF;
  2. Block executes:  RstOp := FALSE;
               │
               ▼
[RstOp returns to FALSE in 1 cycle with 100% deterministic reliability]

Verification

Verify internal input reset behavior through these CFC diagnostic steps:

CFC Test Mode Monitoring: Open a CFC chart containing MotL. Switch to Test Mode (Debug -> Test Mode). Add RstOp to the watch list.
Simulate Operator Click: Double-click RstOp in the CFC watch table. Change the value from 0 to 1.
Observe Automatic Pulse Reset: Notice that RstOp instantaneously flips to 1 and returns to 0 on the very next watch update cycle, proving the AS block cleared the input in RAM.

Limitations and Operational Precautions

When interfacing logic with APL operator inputs, observe these programming rules:

Never Interconnect Logic to *Op Inputs: Do not connect CFC chart lines or SFC step actions directly to *Op inputs (e.g., RstOp). Interconnecting a continuous signal to RstOp causes a continuous write collision where the predecessor writes 1 and the APL block writes 0, causing cyclic CPU overhead and logic flapping. Always connect automated logic to *Li inputs (RstLi).
Feature Bit Control: Some operator commands depend on Feature bit parameterization (e.g., Feature.Bit30 resetting depending on operating mode).
Structured Variable Integrity: Never attempt to modify the ST (Signal Status) byte of an interconnected struct manually inside user logic; utilize official APL utility blocks (StruDiIn, StruDiOu) to maintain diagnostic standards.

Engineer FAQ

Can I write SCL code that resets inputs in my own custom function blocks?

Yes. In STEP 7 / SCL for S7-400, you can assign values to VAR_INPUT variables within the FB algorithm. The SCL compiler permits this because the variable resides in the writable Instance DB.

Why does TIA Portal S7-1500 behave differently regarding VAR_INPUT writing?

TIA Portal S7-1500 strictly enforces IEC 61131-3 compiler rules by default, flagging writes to VAR_INPUT as errors or warnings unless optimized block access and specific compiler compatibility settings are configured.

What is the difference between RstOp and RstLi?

RstOp is an elemental BOOL driven by WinCC operator faceplates with internal reset. RstLi is a structured input (Value + ST) driven by automated interlocking logic or SFC sequences.