Migrating CFC Runtime Groups Between Cyclic Interrupt OBs: OB35 to OB37 Execution Rules and CPU Load Impacts

Moving CFC logic and runtime groups from OB35 (default 100 ms) to OB37 (default 500 ms in S7-400) is fully supported in SIMATIC PCS 7 by dragging the runtime group in the CFC Run Sequence editor. However, engineers must account for scanning frequency and hardware I/O alignment. Shifting high-frequency control loops to a faster OB increases CPU utilization and can saturate communication slices, whereas shifting slow temperature loops to OB37 conserves work memory. Furthermore, any channel driver blocks moved between OBs must have their hardware I/O addresses reassigned to the matching Process Image Partition (PIP) synchronized with that specific cyclic interrupt.

Cyclic Interrupt Organization Blocks in S7-400 Controllers (OB30 to OB38)

In SIMATIC PCS 7, deterministic process control is achieved by scheduling algorithmic execution inside cyclic interrupt Organization Blocks (OB30 through OB38). Unlike standard PLC programs running in the uncoordinated main scan (OB1), cyclic interrupt OBs preempt background tasks at precise, hardware-clocked intervals.

In standard PCS 7 engineering templates, OB35 is configured with an execution interval of 100 ms, serving as the default host for standard PID controllers (PIDConL), motor drives (MotL), and valve actuators (VlvL). Other cyclic OBs (such as OB32 = 1.0 s, OB36 = 50 ms, OB37 = 500 ms, or OB38 = 10 ms) provide multi-tier scheduling flexibility.

The Role of the CFC Run Sequence and Runtime Groups

Continuous Function Chart organizes block execution through Runtime Groups:

When an engineer places a block into a CFC chart, CFC automatically assigns the block to a runtime group named after the chart.
By default, new charts are inserted into the OB specified in the chart folder properties (typically OB35).
Blocks do not execute individually at random; they execute sequentially within their assigned runtime group.
Moving an entire technological circuit from OB35 to OB37 is accomplished by relocating its runtime group in the CFC Run Sequence editor.

CPU Performance Impacts: Scan Time, Loop Overhead, and Thread Jitter

Altering execution frequencies directly impacts controller resources:

Moving to a Faster OB (e.g. 100 ms -> 20 ms): Triples or quintuples the CPU execution overhead. If field transmitters update at slower rates (e.g. a 4-20 mA analog input module updating every 80 ms), executing the PID algorithm at 20 ms processes identical data multiple times, wasting CPU work cycles and increasing cyclic interrupt jitter.
Moving to a Slower OB (e.g. 100 ms -> 500 ms / OB37): Reduces CPU load substantially. For slow thermal dynamics (furnace heating, cooling towers, massive tank levels), a 500 ms or 1000 ms scan rate provides identical control quality while freeing vital processing bandwidth for high-speed motor interlocks.

Process Image Partition (PIP / TPA) Alignment Across Cyclic OBs

The most critical technical requirement when relocating channel driver blocks (Pcs7AnIn, Pcs7DiIn) between OBs is Process Image Partitioning:

In HW Config, I/O module addresses are assigned to Process Image Partitions (PIPs, German: Teilprozessabbild / TPA).
Each PIP is bound to a specific cyclic interrupt OB: PIP 1 is updated synchronously at the start of OB35, PIP 2 with OB36, PIP 3 with OB37.
If an analog input driver is moved to OB37 but its hardware address remains in PIP 1, the driver evaluates process values asynchronously, generating timing jitter or driver bad quality codes (ST = 16#28).

Comparative Parameter Matrix: Standard S7-400 Cyclic Interrupt OBs

The following table summarizes standard cyclic interrupt OB properties in S7-400 / CPU 410 controllers:

Organization BlockDefault Cycle TimeTypical PCS 7 ApplicationBound Process Image PartitionPriority ClassOB3810 msUltra-fast drives, safety interlocksPIP 5Priority 16OB3650 msFast flow and pressure control loopsPIP 2Priority 14OB35100 ms (Default)Standard motors, valves, and PID loopsPIP 1 (TPA 1)Priority 12OB37500 msSlow thermal dynamics, chemical dosingPIP 3 (TPA 3)Priority 10OB34200 msIntermediate auxiliary sequencesPIP 4Priority 9OB321000 ms (1.0 s)Environmental monitoring, totalizersPIP 6Priority 7

Step-by-Step Procedure to Move Logic from OB35 to OB37 in CFC

Follow this engineering procedure to relocate logic safely:

Audit HW Config PIP Alignment: Open HW Config. Select the I/O modules connected to the logic. Under Addresses, change the Process Image Partition from TPA 1 (OB35) to TPA 3 (OB37). Save and compile HW Config.
Open CFC Run Sequence: In the CFC menu bar, select View -> Run Sequence (or click the Run Sequence toolbar icon).
Locate Runtime Group: In the left pane, expand OB35. Locate the runtime group corresponding to your technological chart.
Relocate to OB37: Click and drag the runtime group from OB35 into OB37. Alternatively, right-click the group, select Cut, click OB37, and select Paste.
Update Sampling Time Parameters: For continuous PID controllers (PIDConL), the parameter SampleTime is updated automatically during compilation. Confirm that SampleTime reflects 0.5s in CFC.
Compile Charts: Execute Compile Charts as Program -> Changes Only.
Download Changes: Download changes to the CPU in RUN.

Verification

Verify execution health through these diagnostic steps:

CFC Test Mode Online Check: Open the relocated chart in Test Mode. Confirm blocks update live values smoothly.
CPU Diagnostic Buffer: Check the CPU diagnostic buffer in SIMATIC Manager. Confirm zero entries for 'Cycle time exceeded' or 'OB request error'.
Module Information Cycle Time: In SIMATIC Manager, select CPU -> Module Information -> Performance Data. Verify that OB37 execution time is within expected limits (typically < 15 ms).
Trend Inspection: In WinCC Runtime, inspect PID process variable trends to confirm smooth regulation without stepping artifacts.

Limitations and Operational Precautions

Observe the following execution safeguards:

Fast Interlock Loops: Never move critical safety or protection interlocks to OB37; interlocks protecting mechanical equipment against overload must execute at 100 ms (OB35) or faster.
Sampling Time Stability: Modifying cyclic interrupt execution rates alters the discrete integration time of custom mathematical blocks; verify that custom accumulators use dynamic cycle times (SAMPLE_T) rather than hardcoded constants.
Commercial Accuracy Disclaimer: Software order numbers (MLFBs), package structures, and hardware capacity prerequisites vary across PCS 7 versions and hardware platforms. System integrators must confirm exact software entitlements and licensing requirements against the official Siemens Catalog CA 01 and obtain an authorized Siemens distributor quotation prior to purchasing.