C135 PCS 7 (PCS7)
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PCS 7 CFC Programming Fundamentals - Connecting Field I-O, Interlocks, and HMI Operator Controls

PCS 7 CFC Programming Fundamentals - Connecting Field I-O, Interlocks, and HMI Operator Controls

In SIMATIC PCS 7, Continuous Function Chart (CFC) programming differs fundamentally from classical PLC ladder or function block logic by enforcing a technological DCS architecture. Hardware I/O signals from the Symbol Table (such as fault input I0.0 or output coil Q1.0) cannot be wired directly to logical gates; they must interface through APL channel driver blocks (Pcs7DiIn and Pcs7DiOu), which automatically manage hardware diagnostics. To implement a monitored device with HMI operator control, connect Pcs7DiIn to an interlock block (Intlk02) and digital monitor block (MonDiL), connect the interlock output to an operator block (OpDi01), and connect OpDi01 to Pcs7DiOu. The AS-OS compilation process automatically creates the corresponding WinCC tags, faceplates, and alarms without manual HMI scripting.

Table of Contents

Executive Summary

Engineers transitioning from classical STEP 7 (LAD/FBD/STL) or modular PLC systems to SIMATIC PCS 7 frequently struggle with CFC programming paradigms. In PCS 7, logic is not designed by writing raw rungs or manually binding HMI memory bits. Instead, PCS 7 utilizes an integrated Distributed Control System (DCS) philosophy where software blocks encapsulate controller execution, NAMUR NE107 signal status quality, alarm generation, and operator faceplate visualization into unified technological objects. Understanding how channel drivers, monitoring blocks, interlocks, and operator controls connect within CFC unlocks rapid, standardized automation engineering.

Architecture and Fundamental Mechanics

The architectural framework of PCS 7 CFC programming operates through structured technological layers:

  1. The Channel Driver Abstraction Layer:
    * Physical field signals (I0.0, Q1.0, IW512) are never wired directly to technological blocks.
    * Channel driver blocks (Pcs7DiIn, Pcs7DiOu, Pcs7AnIn, Pcs7AnOu) serve as the hardware abstraction layer.
    * During compilation with Generate module drivers, PCS 7 automatically connects channel drivers to system diagnostic blocks (MOD_D1, RACK), monitoring wire breaks, hardware faults, and module health.
  2. Technological Logic and Interlocking:
    * Process monitoring is decoupled from raw boolean math: MonDiL evaluates digital states, generates time-stamped alarms, and drives status glyphs on WinCC.
    * Interlocks (Intlk02, Intlk04) aggregate multiple permissive and trip conditions into structured outputs, providing operators with first-out trip diagnostics.
  3. Operator Control and Authorization (OpDi01):
    * Instead of toggling raw HMI internal memory bits (M), operator commands are processed by dedicated operator blocks (OpDi01).
    * These blocks enforce user security levels, check interlocking permissives before allowing execution, and generate electronic audit trail records (Bedienmeldungen).
  4. Automated AS-OS Engineering Integration:
    * Every APL block possesses internal attributes designating WinCC relevance (S7_m_c := 'true').
    * During the AS-OS Compile, PCS 7 automatically generates the WinCC Tag Management database, configures Alarm Logging messages, and creates dynamic block icons in process graphics, eliminating manual HMI tag engineering.

Step-by-Step Implementation Procedure

Follow these procedures to build a complete monitored start/stop control loop in PCS 7 CFC:

  1. Configure Hardware and Symbols in HW Config:
    * Open HW Config in SIMATIC Manager.
    * Address your digital input card and digital output card.
    * In the Symbol Table, assign symbolic names (e.g., Device_Fault for I0.0, Device_Run_Cmd for Q1.0).
    * Save and compile HW Config.
  2. Create Technological CFC Chart in Plant Hierarchy:
    * In SIMATIC Manager Plant View, right-click the target plant folder and select Insert New Object > CFC.
    * Name the chart (e.g., CFC_MotorControl) and open it in the CFC editor.
  3. Instantiate and Wire Channel Drivers:
    * From Libraries > PCS 7 AP Library > Channel, drag Pcs7DiIn and Pcs7DiOu into the chart.
    * Right-click Pcs7DiIn.PV_In and select Interconnection to Address...; pick symbol Device_Fault (I0.0).
    * Right-click Pcs7DiOu.PV_Out and select Interconnection to Address...; pick symbol Device_Run_Cmd (Q1.0).
  4. Insert Monitoring and Interlocking Blocks:
    * Drag MonDiL (FB 1848) and Intlk02 (FB 1824) from the APL library into the chart.
    * Connect Pcs7DiIn.PV_Out to MonDiL.In (for HMI status display and alarm generation).
    * Connect Pcs7DiIn.PV_Out to Intlk02.In01.
    * If fault active = 1 means trip, set Intlk02.InvIn01 = TRUE (inverting logic so healthy state = 1).
  5. Insert Operator Control Block (OpDi01):
    * Drag OpDi01 (FB 1866) into the chart.
    * Connect Intlk02.Out to OpDi01.Intlock.
    * Connect OpDi01.Out to Pcs7DiOu.PV_In.
  6. Compile and Execute AS-OS Compile:
    * In CFC, select Chart > Compile > Scope: Changes only with Generate module drivers enabled.
    * Download changes to the AS controller in RUN.
    * In SIMATIC Manager, right-click the OS project and select Compile (AS-OS Compile) to generate WinCC tags and faceplates automatically.

Verification

In WinCC Runtime, open the process graphic corresponding to the plant hierarchy folder. Verify that the automatically generated block icons for MonDiL and OpDi01 appear. Toggle I0.0 to TRUE in field or simulation; confirm that MonDiL triggers a red fault alarm and Intlk02 disables the operator button on OpDi01. Return I0.0 to FALSE; open the OpDi01 faceplate, click Start, and verify that output coil Q1.0 energizes immediately.

Limitations and Operational Precautions

Never bypass channel drivers by wiring elementary boolean addresses directly into technological block inputs, as this disables hardware fault diagnostics and NAMUR status evaluation. Ensure the AS controller and OS stations maintain matching system time to prevent alarm timestamp anomalies.

Engineer FAQ

Why does PCS 7 prohibit connecting I0.0 directly to logic gates?

PCS 7 requires channel drivers to monitor hardware status, wire breaks, and power failures; direct wiring bypasses Basis Library diagnostics.

How does WinCC know which blocks exist in CFC?

Blocks marked with attribute S7_m_c := 'true' are automatically discovered and populated into WinCC during the AS-OS compilation.

What block provides a pre-built start/stop faceplate on WinCC?

OpDi01 provides pre-built digital operator control faceplates, while MotL provides complete motor control with feedback monitoring.

What is the role of the Plant Hierarchy in CFC?

The Plant Hierarchy defines the organizational structure of charts and automatically assigns picture paths and tag prefixes in WinCC.

Technical References

Related Articles

Related Tags

  • CFC Editor
  • APL Fundamentals
  • Pcs7DiIn
  • OpDi01
  • AS-OS Compile
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