Preserving Motor Command States and Operating Modes After Fault Reset in APL Block MotSpdCl

Preserving Motor Command States and Operating Modes After Fault Reset in APL Block MotSpdCl

In SIMATIC PCS 7 Advanced Process Library (APL), the motor speed control block MotSpdCl (FB1856) resets its operating commands and setpoints to zero following a trip or interlock fault by default to ensure industrial safety. To configure the block so that resetting or acknowledging a fault retains the last valid operating parameters and direction without requiring manual re-entry on the faceplate, set Feature.Bit0 ('Startup characteristics / start via last valid position') to 1 (TRUE). Additionally, configuring Feature.Bit22 to 1 updates and saves the operating mode across stop conditions. Automatic restart behavior must be evaluated against plant safety standards before deployment.

Table of Contents

Default Safety Trip Logic in APL Drive Blocks

In industrial automation, unexpected motor restarts following an emergency stop, overload trip, or field interlock violation present severe hazards to personnel and machinery. By default, Siemens Advanced Process Library (APL) drive blocks—including MotL (single speed), MotRevL (reversing motor), and MotSpdCl (motor with speed control)—enforce a strict fail-safe reset policy.

When a fault occurs (such as dynamic monitoring error MonDynErr, motor protection trip Trip, or interlock LockAct = 1):
1. The controller immediately drives output commands (Fwd, Rev, SP_Out) to zero.
2. Internal command latches are cleared.
3. When the fault is cleared and acknowledged (AckOp or AckProt), the block remains in a safe stopped state.

In continuous production environments where trips are caused by transient process interlocks (e.g., brief downstream tank high-level warnings), plant operators often prefer the drive to resume its previous setpoint and direction immediately upon acknowledgment, avoiding cumbersome manual re-parameterization on the WinCC faceplate.

Feature Bit Configuration for Retaining Operating Parameters

The Advanced Process Library utilizes 32-bit Feature control words to customize block behavior without altering internal SCL algorithm code. For MotSpdCl, two primary Feature bits govern state retention:

Feature BitParameter NameDefault ValueConfigured ValueFunctional Effect on MotSpdClFeature.Bit0Startup characteristics0 (False)1 (True)Restores last valid speed setpoint and direction upon startup / fault recoveryFeature.Bit22Update operating mode during stop0 (False)1 (True)Retains active operating mode (Manual, Auto, Local) across stop statesFeature.Bit17Bumpless switch to Automatic mode0 (False)1 (True)Prevents speed spikes when transitioning modes after fault clearFeature.Bit30Resetting depending on operating mode0 (False)1 (True)Requires reset command matching the active mode before clearing trip latches

When Feature.Bit0 = 1, MotSpdCl stores the pre-fault speed setpoint (SP_Ext or SP_Int) and directional command in internal static memory, restoring them immediately when the interlock resets and the operator acknowledges the fault.

Step-by-Step Parameterization Workflow on MotSpdCl

To configure MotSpdCl to retain direction and speed setpoint following a fault reset, execute the following engineering steps:

  1. Locate Target MotSpdCl Instance in CFC: Open the Continuous Function Chart containing the motor control module.

  2. Open Block Properties: Double-click the MotSpdCl block to open its Properties dialog, or navigate to the Feature input pin.

  3. Configure Feature Bit 0: Expand the Feature structure. Set Feature.Bit0 = TRUE (Start with last valid position / startup characteristics).

  4. Configure Feature Bit 22: Set Feature.Bit22 = TRUE to ensure that if the motor stopped during Manual mode, it remains in Manual mode with its previous direction selection upon reset.

  5. Review Reset Behavior (RstOp / RstLi): If reset commands originate from the WinCC faceplate, ensure Feature.Bit30 = FALSE or configure the appropriate reset interconnection to RstLi for automated reset sequences.

  6. Compile and Download Changes: Execute Chart -> Compile -> Chart as Program -> Scope: Changes Only. Download changes to the AS controller in RUN mode.

Verification

Verify motor command preservation through controlled operational testing:

  1. Baseline Operation: Start the motor in Manual mode at 75% speed setpoint in Forward direction. Confirm Fwd = 1 and SP_Out = 75.0%.
  2. Simulate Process Fault: Trigger a test fault by opening an interlock input (Intlock = 0). Verify that the motor stops immediately (Fwd = 0, SP_Out = 0.0%) and the faceplate displays the red interlock icon.
  3. Clear and Acknowledge: Restore the interlock signal (Intlock = 1) and click Reset on the WinCC faceplate. Verify that MotSpdCl automatically restores Fwd = 1 and resumes output at SP_Out = 75.0% without requiring re-entry.

Limitations and Operational Precautions

When configuring automatic command retention on industrial machinery, observe these critical safety guardrails:

  • Machine Safety Compliance (ISO 13849-1 / IEC 60204-1): International safety standards strictly prohibit automatic restarting of machinery following an emergency stop or safety trip if restarting can create a hazard to human operators. Retaining commands must only be enabled where risk assessments confirm no mechanical entrapment hazards exist.
  • Distinction Between Process Interlocks and Safety Trips: Hardwired safety emergency stops must actuate safety contactors or Safety Integrated drives (STO) independently of the standard PCS 7 APL software logic.
  • Master Data Library Consistency: Update the Feature bit default on the Control Module Type (CMT) in your Master Data Library rather than altering individual chart instances, ensuring uniform plant-wide behavior.

Engineer FAQ

Does Feature.Bit0 cause the motor to restart immediately when power is restored to the CPU?

Yes. If the AS CPU experiences a power failure and restarts, Feature.Bit0 instructs the block to resume the last operating state prior to shutdown, provided start interlocks are satisfied.

Why does the faceplate still require clicking Reset after an interlock clears?

Clearing an interlock removes the stop condition, but APL blocks require an explicit reset (via faceplate RstOp or program RstLi) to acknowledge that the operator is aware the trip condition has cleared.

Can I retain speed setpoint but force the start command to require a new click?

Yes. By leaving Feature.Bit0 as 0 and setting SP_TrkExt or utilizing internal setpoint tracking, the setpoint remains at 75%, but the operator must press the Start button to re-energize the drive.

Technical References

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Related Tags

  • MotSpdCl
  • APL
  • Feature Bits
  • Motor Control
  • Machine Safety
  • PCS 7 V9.0
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