Ramping Manipulated Variables in PCS 7 APL PidConR Using RateLim and ExtReset

In SIMATIC PCS 7 Advanced Process Library (APL), the continuous controller block PidConR has native internal ramping for its Setpoint (SP_UpRmp / SP_DnRmp), but does not possess an internal ramp generator for its Manipulated Variable (MV) in Manual mode. To ramp the manipulated variable output (such as ramping from 0% to 80% over 30 seconds), integrate an external rate limiter block (RateLim) on the controller output. In the verified APL template PIDConR_MV_Ramp, PidConR.MV routes into RateLim.In, and the limited output RateLim.Out is fed back into PidConR.ExtReset to prevent integrator windup and ensure bumpless manual tracking.

Executive Summary

Precise rate-of-change control over final control elements (such as slow opening of high-pressure steam valves or progressive ramp-up of large slurry pumps) is essential to prevent thermal shock, water hammer, and mechanical stress. When using the APL controller block PidConR, engineers frequently expect a built-in parameter to ramp the manual output (MV_Man) linearly over time. Because the internal ramping engine in PidConR governs exclusively the setpoint (SP), manual output steps occur instantaneously. To achieve manipulated variable ramping, Siemens provides a standardized architectural pattern using the RateLim block. This article explains the feedback mechanics of ExtReset, details parameter calculations, and presents the step-by-step implementation.

Architecture and Fundamental Mechanics

PidConR Algorithm Structure, RateLim Functionality, and ExtReset Integrator Feedback:

Internal Setpoint Ramping vs. External MV Ramping:
PidConR features internal parameters SP_RmpOn, SP_RmpMod, and SP_UpRmp / SP_DnRmp (in units/second).
These parameters govern how the internal Setpoint (SP) tracks changes in Automatic mode.
In Manual mode, the operator sets MV_Man directly, and the algorithm outputs this value to MV without rate limiting.
Architecture of the RateLim Block:
The APL block RateLim limits the gradient of an incoming continuous analog signal:
- UpGradLim: Positive rate limit in units/second (e.g. 80% / 30s = 2.667 %/s).
- DnGradLim: Negative rate limit in units/second.
When the operator inputs 80% into MV_Man, RateLim clamps the derivative of the output Out, ramping smoothly from 0% to 80% over 30 seconds.
The Critical Role of ExtReset Feedback:
If an engineer simply places RateLim after PidConR without feedback, a catastrophic problem arises: integrator runaway.
The internal PID algorithm would assume the valve is already at 80%, while the physical valve is still at 20%.
To guarantee mathematical synchronization, the rate-limited output RateLim.Out must be wired back into PidConR.ExtReset (External Reset Input).
With ExtReset active, the PidConR internal integrator tracks the physical ramped position continuously, guaranteeing 100% bumpless transfer when switching between Manual and Automatic modes.

Step-by-Step Implementation Procedure

Instantiate the RateLim Block in CFC:
* In the CFC chart hosting PidConR, open the block catalog.
* Navigate to PCS 7 AP Library > Mathematical Blocks > RateLim.
* Drag and drop RateLim onto the chart alongside PidConR.
Configure Gradient Limits on RateLim:
* Open the Object Properties for RateLim.
* Calculate gradient: Target Delta / Time = 80.0 / 30.0 = 2.667 (%/second).
* Set UpGradLim = 2.667.
* Set DnGradLim = 2.667 (or desired down-ramp rate).
* Ensure TimeFac is set to seconds (default 1.0).
Interconnect Signals Between PidConR and RateLim:
* Connect PidConR.MV output to RateLim.In.
* Connect RateLim.Out to the field analog output driver (e.g. VlvAnL.MV_Ext or channel driver Pcs7AnOu).
* Interconnect RateLim.Out back to PidConR.ExtReset.
Configure External Reset Tracking on PidConR:
* In PidConR, set the configuration parameter ExtResetOn = 1 (or dynamic enable).
* This instructs the PID algorithm to lock its internal integrator to the rate-limited feedback value.
Compile and Download Changes in RUN:
* Compile CFC charts with 'Changes only'.
* Download changes to the AS controller in RUN mode.

Verification

In WinCC Runtime, open the PidConR faceplate and place the loop in Manual mode.
Enter a step change from 0.0% to 80.0% in the manual output field.
Start a timer; observe that the effective output ramps smoothly, reaching exactly 80.0% at the 30-second mark.
Switch to Automatic mode mid-ramp; verify that the transition is completely bumpless without sudden valve movement.

Limitations and Operational Precautions

When using RateLim, ensure that emergency shutdown or interlock logic acts directly on the final output or bypasses the RateLim block using its Track input (Track = 1 forces Out to track TrackIn immediately), preventing slow ramp-down during safety trips.

Engineer FAQ

Does PidConR have internal ramping for manual output?

No. PidConR has internal ramping only for the Setpoint (SP). Manual output ramping requires the external RateLim block.

Why is RateLim.Out connected back to PidConR.ExtReset?

To keep the PID controller's internal integrator synchronized with the actual ramped valve position, preventing integrator windup and ensuring bumpless transfer.