Reading Controller Clock Time in SIMATIC PCS 7 CFC - SFC1 Implementation and Plant Bus Time Synchronization

To read the current controller time in SIMATIC PCS 7 CFC, engineers use standard System Function SFC1 READ_CLK or APL library blocks such as TimeTrig and Clock. SFC1 reads the S7-400 CPU internal hardware clock and outputs the time formatted as a DATE_AND_TIME (DT) structure, which can be decomposed into year, month, day, hour, and minute using standard IEC helper blocks (FC6, FC7, FC8, FC33). For the CPU clock to reflect real-world plant time accurately, the S7-400 CPU must be configured as a Time Slave in HW Config, synchronized across the Industrial Ethernet Plant Bus via a SICLOCK hardware master or a WinCC OS Server acting as Time Master.

Reading Controller System Time via SFC1 READ_CLK

In SIMATIC PCS 7 S7-400 automation stations, the CPU maintains a real-time hardware clock backed by an onboard capacitor and lithium backup battery.

In CFC, the standard method for querying this hardware clock is System Function SFC1 READ_CLK (located in the standard STEP 7 block library under Standard Library -> System Function Blocks -> Blocks):
* RET_VAL (INT): Returns 0 when time reading succeeds, or an error code if the clock is uninitialized or defective.
* CDT (DATE_AND_TIME): Outputs the 8-byte BCD-encoded date and time value representing:
- Byte 0: Year (00–99, mapped to 1990–2089)
- Byte 1: Month (01–12)
- Byte 2: Day of Month (01–31)
- Byte 3: Hour (00–23)
- Byte 4: Minute (00–59)
- Byte 5: Second (00–59)
- Byte 6–7: Milliseconds and Day of Week (1=Sunday..7=Saturday).

Decomposing the DATE_AND_TIME Data Structure in CFC

Because CFC charts handle discrete elementary signals (REAL, DINT, BOOL) more cleanly than composite 8-byte DATE_AND_TIME variables, engineers decompose the CDT output using standard IEC Function blocks:

[SFC1: READ_CLK]
   │
   ├─► RET_VAL (INT)
   └─► CDT (DATE_AND_TIME)
         │
         ├──► [FC6: D_TOD] ────► Time of Day (TOD: e.g., TOD#14:30:00.000)
         ├──► [FC8: DT_DATE] ──► Current Date (DATE: e.g., D#2026-10-19)
         │
         └──► [FC33: SPLIT_DT] (or custom SCL block)
                ├──► Year   (INT)
                ├──► Month  (INT)
                ├──► Day    (INT)
                ├──► Hour   (INT) ──► Comparator (CMP_I): Hour == Target_Hour
                ├──► Minute (INT) ──► Comparator (CMP_I): Minute == Target_Minute
                └──► Second (INT)

By connecting the Hour and Minute outputs to integer comparators (CMP_I), automated data transfer sequences, batch reports, or shift totalization pulses can be triggered deterministically.

APL Alternative Blocks - TimeTrig and OpTime

For standard PCS 7 projects using the Advanced Process Library (APL), creating manual SFC1 logic is often unnecessary:
* TimeTrig Block: Specifically engineered to trigger recurring periodic pulses (hourly, daily, weekly, or specific time of day). It integrates directly with WinCC faceplates, allowing operators to adjust scheduled dispatch times from the HMI without CFC chart modifications.
* OpTime Block: Accumulates operational runtime hours and switching cycles for motors and valves, referencing controller clock cycles internally without requiring external clock unpacking.

PCS 7 Plant Bus Time Synchronization Architecture

The accuracy of SFC1 READ_CLK depends entirely on plant-wide time synchronization. A controller operating without synchronization will drift by several seconds per week.

The following table summarizes the synchronization roles across SIMATIC PCS 7 components:

System ComponentTime Sync RoleConfiguration InterfaceProtocol UsedExternal Master (SICLOCK TC 100/400)Central Time MasterDedicated GPS/DCF77 receiverNTP or SIMATIC Time ProtocolWinCC OS Server (Redundant Pair)Time Master (if no SICLOCK)WinCC Explorer -> Time SynchronizationSIMATIC Time Protocol over Industrial EthernetS7-400 / CPU 410-5H ControllerTime SlaveHW Config -> CPU Properties -> Diagnostics/ClockSynchronized via CP 443-1 or Onboard PN portET 200M Distributed I/OTime SlaveHW Config -> IM 153-2 Properties1ms precision SOE (Sequence of Events) timestampingWinCC OS ClientsTime SlaveWinCC Explorer -> Time SynchronizationSynchronized via Terminal Bus from OS Server

Verification

To confirm that clock reading and time synchronization are functioning accurately:
1. Open the CFC chart containing SFC1 READ_CLK and switch to test mode (Debug -> Test Mode); verify that RET_VAL reads 16#0000.
2. Inspect the output of FC6 D_TOD or FC33 SPLIT_DT; confirm that hours, minutes, and seconds track the real-world atomic clock.
3. In SIMATIC Manager, select the CPU and execute PLC -> Set Time of Day; verify that the CPU time matches the OS Server time within 10 milliseconds.
4. Verify that the hardware configuration for the CPU displays Synchronization: In AS = Slave, and confirm that time synchronization telegrams are received periodically from the plant bus master.

Limitations and Operational Precautions

Never configure an S7-400 CPU as a Time Master if an OS Server or SICLOCK master is already transmitting time frames on the same Industrial Ethernet plant bus. Multiple conflicting time masters will cause erratic clock jumps, disrupted alarm chronological sorting in WinCC Alarm Logging, and catastrophic batch sequencing errors in SIMATIC BATCH.

Engineer FAQ

What is the difference between `SFC1 READ_CLK` and `SFC64 TIME_TCK`?

SFC1 reads the real-world calendar date and time (DATE_AND_TIME). SFC64 reads the internal millisecond tick counter of the CPU (0 to 2,147,483,647 ms), which is used for relative elapsed duration calculations rather than wall-clock time.

Does `SFC1` output UTC or Local Time?

In SIMATIC PCS 7, the CPU hardware clock is configured by default to run in UTC (Coordinated Universal Time) to prevent double-logging or missing hours during daylight saving time transitions. Local time offsets are applied at the WinCC OS display level.

Can I call `SFC1` inside a fast cyclic interrupt like `OB35` (100ms)?

Yes, SFC1 has minimal execution overhead. However, calling it once in a slower cyclic OB (such as OB32 1000ms) or sharing the decoded time across charts is more efficient.

Why does `SFC1` return an error in S7-PLCSIM?

In S7-PLCSIM, SFC1 inherits the PC system clock. If the simulation clock is paused or uninitialized, RET_VAL may return a non-zero error until simulation starts.

Technical References

Related Tags

SFC1 READ_CLK
Time Synchronization
CFC Programming
DATE_AND_TIME
SICLOCK

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Reading Controller Clock Time in SIMATIC PCS 7 CFC - SFC1 Implementation and Plant Bus Time Synchronization