Resolving Cyclic Interrupt OB Priority Conflicts During AS-Wide Interconnection Compilation

In SIMATIC PCS 7, the compilation error 'The cyclic interrupt OB30 - OB38 must be parameterized in such a way that its cycle times and priorities relate to each other. The faster the cycle time, the higher the priority must be' occurs when compiling AS-wide interconnections across controllers while the S7-400 CPU Organization Block priorities violate deterministic scheduling rules. To resolve this, open STEP 7 HW Config for each AS controller, navigate to CPU Properties -> 'Cyclic Interrupts', and ensure that Organization Blocks with shorter cycle intervals strictly possess higher priority values than slower OBs.

The Mechanics of AS-Wide Interconnections in SIMATIC PCS 7

In large-scale process automation facilities comprising multiple S7-400 or CPU 410-5H controllers, technological strategies frequently require real-time data exchange across automation stations (e.g. AS 1 sending steam pressure to AS 2; AS 2 transmitting chiller permissives to AS 1).

SIMATIC PCS 7 simplifies cross-controller communication through AS-Wide Interconnections:
* In the CFC editor, an engineer simply drags an output pin from a chart in AS 1 and drops it directly onto an input pin in a chart in AS 2 within the same Multiproject.
* The system deploys the AS-Wide Interconnection Wizard:
- Automatically generates communication partner blocks (IK_SEND / IK_RCV).
- Automatically manages underlying S7 communication system functions (SFB 12 BSEND / SFB 13 BRCV or USEND / URCV).
- Sets up buffer DBs and schedules deterministic transmission cycles over the Industrial Ethernet plant bus.

Cyclic Interrupt OB Scheduling and Monotonic Priority Rules

In the SIMATIC S7-400 operating system, cyclic interrupt tasks are executed within Organization Blocks OB30 through OB38:
* Each OB is assigned an Execution Interval (e.g. OB35 = 100 ms, OB32 = 1000 ms).
* Each OB is assigned an execution Priority Class (ranging from 1 = Lowest to 24 = Highest).

The Golden Rule of Real-Time Systems (Rate-Monotonic Scheduling):
$$\text{Faster Cycle Time (Shorter Period)} \implies \text{Higher Priority Class}$$
* If a high-speed task (e.g. 10 ms in OB38) triggers while a slow task (e.g. 1000 ms in OB32) is executing, the CPU operating system must immediately preempt the slow task to service the fast task.
* If an engineer incorrectly sets the 1000 ms task to Priority 15 and the 100 ms task to Priority 12, the slow task will block the fast task from executing, causing severe jitter, communication buffer overflows, and cyclic overruns.

Why the CFC Compiler Enforces Strict Priority Ordering

When compiling charts with AS-wide interconnections:
1. The compiler verifies the execution timing of the blocks transmitting data (IK_SEND) and the blocks receiving data (IK_RCV).
2. S7 communication buffer handshakes require deterministic sequencing: a receiving block running in a fast OB must not be starved of CPU time by a lower-frequency task running at an artificially inflated priority.
3. If the compiler detects any inversion—such as OB32 (1000 ms) having a priority $\ge$ OB35 (100 ms)—the AS-wide communication wizard immediately halts compilation with a fatal error to prevent runtime communication deadlock.

Standard S7-400 Cyclic Interrupt OB Configuration Matrix

The following matrix outlines the factory default and certified priority structure for SIMATIC PCS 7 controllers:

Organization BlockDefault Cycle TimeCertified Priority ClassAllowable Cycle RangeOB3810 ms15 (Highest Cyclic)1 ms to 60,000 msOB3720 ms141 ms to 60,000 msOB3650 ms131 ms to 60,000 msOB35100 ms (Standard PCS 7)12 (Standard Baseline)1 ms to 60,000 msOB34200 ms111 ms to 60,000 msOB33500 ms101 ms to 60,000 msOB321000 ms (1.0 s)91 ms to 60,000 msOB312000 ms (2.0 s)81 ms to 60,000 msOB305000 ms (5.0 s)7 (Lowest Cyclic)1 ms to 60,000 ms

Step-by-Step Procedure to Align OB Priorities in HW Config

Follow this procedure to resolve the priority conflict and complete AS-wide compilation:
1. Open HW Config for the Affected AS Controller:
- In SIMATIC Manager, navigate to the AS station reporting the compilation error.
- Double-click the Hardware object to open HW Config.
2. Access CPU Cyclic Interrupt Properties:
- Double-click the S7-400 CPU (or CPU 410-5H) in the rack table.
- In the Properties dialog, select the Cyclic Interrupts tab.
3. Verify and Correct Priorities and Intervals:
- Inspect every configured OB row from OB30 through OB38.
- Verify that every OB with a faster cycle time has a strictly higher priority number than any OB with a slower cycle time.
- Example Fix: If OB32 (1000 ms) was modified to Priority 12 and OB35 (100 ms) is Priority 12, change OB32 back to Priority 9.
4. Repeat for All Communication Partner Controllers:
- Open HW Config for the partner AS controller connected via AS-wide interconnections.
- Verify and align its Cyclic Interrupt tab to the exact same priority rules.
5. Save, Compile, and Download Hardware Configuration:
- In HW Config, select Save and Compile.
- Download the hardware configuration to the CPU (can be executed via CiR in RUN on S7-400H / CPU 410-5H).
6. Recompile CFC Charts:
- In SIMATIC Manager, right-click the Charts folder and select Compile -> Charts as Program.
- Select Scope: Entire program (mandatory after OB schedule adjustments).
- Confirm that the AS-wide interconnection compilation finishes with 0 Errors.

Verification

Verify that AS-wide communication compiles cleanly and executes:
1. Observe the CFC compilation log: Confirm that the AS-wide communication generation succeeds with zero priority error prompts.
2. In NetPro: Verify that the cross-AS connection displays status Configured / Valid.
3. Open both CFC charts online in test mode (one chart in AS 1, partner chart in AS 2):
- Modify an analog setpoint on the sending block in AS 1.
- Confirm that the receiving block in AS 2 updates to the new value within the expected cyclic latency window (< 200 ms).
4. Open the CPU Diagnostic Buffer (Ctrl + D): Confirm zero entries for OB80: Cycle time exceeded or task scheduling overruns.

Limitations and Operational Precautions

Altering OB cycle times or priorities in HW Config without Configuration in RUN (CiR) requires an AS STOP; plan hardware downloads during plant turnarounds if non-redundant CPUs are used.
Do not assign the same priority class to multiple cyclic OBs unless their cycle times are identical.
S7-400 operating system priorities range from 1 to 24; never set cyclic interrupt OBs higher than diagnostic interrupt OBs (OB82 at Priority 26 / OB86 at Priority 28), which must always preempt cyclic logic to service hardware faults.

Engineer FAQ

Can AS-wide interconnections operate over standard TCP/IP?

Yes. AS-wide interconnections operate over Industrial Ethernet using ISO Transport or ISO-on-TCP (RFC 1006) protocol configured in NetPro.

What is the maximum number of AS-wide interconnections supported per CPU?

The limit depends on the CPU communication budget and S7 connection resources, typically supporting up to hundreds of interconnections using multiplexed BSEND/BRCV telegrams.

Why did the error occur only after adding an AS-wide interconnection, when local charts compiled fine?

Local intra-AS charts do not strictly validate inter-OB priority monotonicity if communication blocks are not present. The strict validation check is triggered specifically by the AS-Wide Interconnection Wizard to guarantee cross-controller transmission safety.