Resolving Unresponsive CTUD Counter Execution in Continuous Function Chart (CFC)

When the up/down counter CTUD (FB15) in Continuous Function Chart (CFC) fails to respond to input commands—such as failing to load preset value PV on a rising edge of S (SET) or ignoring count up (CU) and count down (CD) pulses—the failure is caused by instantiating the counter from the S7-300 elements library instead of the S7-400 elements library. In PCS 7, S7-300 elementary blocks rely on accumulator structures and system registers incompatible with S7-400 and CPU 410-5H runtime microcode. Deleting the S7-300 block instance and replacing it with CTUD from the CFC Library under 'S7-400 Elements' immediately restores normal counting and preset loading execution.

CFC Elementary Library Architecture: S7-300 vs S7-400 Elements

The SIMATIC PCS 7 CFC software package serves as a continuous graphical engineering tool for both SIMATIC S7-300 and S7-400 controller families. To support both hardware architectures, the default CFC block catalog provides two distinct branches of elementary logic blocks:

300elements: Elementary blocks (flip-flops, timers, counters, math functions) compiled specifically for the register and instruction set architecture of SIMATIC S7-300 and ET 200S CPUs.
400elements: Elementary blocks compiled specifically for SIMATIC S7-400 and AS 410-5H processors.

Because PCS 7 is built exclusively on S7-400 and CPU 410 controllers, all elementary blocks instantiated in PCS 7 charts must originate from the 400elements container.

Root Cause of Unresponsive CTUD Counter Behavior

The table below details functional differences between the two CTUD implementations:

Library ContainerTarget HardwareBlock Name / NumberBehavior in S7-400 / CPU 410 RuntimeCFC Library / 300elementsS7-300, ET 200S CPUsCTUD (FB15)Malfunctions: Internal edge detection flags and accumulator loading fail silently; outputs CV, QU, QD freeze.CFC Library / 400elementsS7-400, CPU 410-5HCTUD (FB15)Normal Operation: Rising edge on S loads PV to CV; pulses on CU/CD increment/decrement reliably.APL Library (Advanced)S7-400, CPU 410-5HCountOh / CountScLFull APL integration with faceplates, limit alarms, and operator maintenance views.

Remediation Procedure in CFC Editor

To resolve the counter malfunction and instantiate the correct block:

Step 1: Remove Mismatched S7-300 Block Instance

Open the affected CFC chart in the CFC Editor.
Select the malfunctioning CTUD block and press Delete.
In the CFC menu, select Options -> Block Types... -> click Clean Up to purge the S7-300 block type from the chart container.

Step 2: Instantiate S7-400 CTUD Counter

In the CFC left catalog pane, expand Libraries -> CFC Library.
Expand 400elements (or Elementary Blocks -> Counters).
Drag and drop CTUD onto the chart canvas.

Step 3: Reconnect Signals and Recompile

Reconnect input signals: CU (Count Up), CD (Count Down), S (Set Preset), PV (Preset Value), and R (Reset).
Reconnect output signals: QU (Counter High), QD (Counter Low), and CV (Current Count Value).
Compile CFC (Compile -> Changes only) and execute Download Changes to the AS controller.

Verification

To verify that the newly instantiated CTUD counter operates correctly:

Open the CFC chart in Online Test mode (eyeglasses icon).
Set parameter PV = 10 and toggle parameter S (Set) from 0 to 1.
Verify that parameter CV (Current Value) immediately updates to 10.
Inject a rising edge pulse into parameter CU: verify that CV increments to 11.
Inject pulses into parameter CD: verify that CV decrements accurately and that output QD asserts when CV <= 0.

Limitations and Operational Precautions

Operational boundaries when utilizing elementary counter blocks:

Power-Loss Retention: Elementary blocks like CTUD store values in instance data blocks. If the CPU experiences a cold restart or memory reset without battery backup, CV resets to zero; use retentive memory or APL counters if retention across restarts is required.
Integer Range Limits: Parameter CV on classic CTUD is a 16-bit signed integer (INT), limiting counts to $0 \text{ to } 32,767$. For large-scale batch counts or pulse totals, deploy double-integer counters (DINT) or APL blocks (CountScL).
Edge Triggering Sensitivity: Inputs CU, CD, and S require genuine boolean transition edges (0 to 1). If an upstream signal remains high continuously (1), the counter will not execute repeated counts.

Engineer FAQ

Why didn't the S7-300 CTUD counter work in an S7-400 CPU?

S7-300 elementary blocks utilize specific accumulator instructions and memory addressing tailored to S7-300 processor hardware. In an S7-400 CPU, internal edge evaluation fails, leaving the block unresponsive.

How do I know if an existing block was taken from 300elements or 400elements?

Right-click the block in CFC -> select Object Properties. Check the block header information and author field: it will indicate S7-300 or S7-400.

Does replacing the block require stopping the CPU?

No. Replacing the block, recompiling CFC changes, and downloading changes only can be performed while the CPU is in RUN mode.

What is the modern APL alternative to CTUD?

The PCS 7 Advanced Process Library provides blocks like CountOh (operating hours counter) and CountScL (scaling counter with limit monitoring and WinCC faceplates).