Troubleshooting Recipe Limit Violations and Floating-Point Underflow in SIMATIC BATCH Phase Interfaces

In SIMATIC BATCH (v8.0, v8.1, v8.2, and newer), anomalous recipe limit violations characterized by extreme negative numbers (e.g., -1.0e-38, -3.4e+38) or display garble occur when IEEE 754 floating-point underflow or uninitialized REAL variables pass through the Equipment Phase (EPH/IEPH) interface. This condition typically originates in the AS automation logic when an analog channel driver (such as FbAnIn / Pcs7AnIn) passivates, an open wire occurs, or an uninitialized data block address transmits raw binary zeros without proper signal status evaluation. To resolve this issue, engineers must configure quality code validation (ST_Worst) in the CFC phase logic, apply lower-limit clamping prior to transmitting values to the SIMATIC BATCH interface blocks, and verify unit format consistency across the BATCH engineering data.

Root Causes of Floating-Point Anomalies in Phase Interfaces

During recipe execution in SIMATIC BATCH, equipment phases (IEPH or SFC Types) continuously exchange parameters, process setpoints, and actual feedback values with the batch server. When a batch recipe step fails to transition and reports a 'Limit Violation' accompanied by an implausible value (such as -1.000000e-038 or 16#7F800000), the issue is rarely a fault within the SIMATIC BATCH recipe compiler.

Instead, three specific automation-layer anomalies cause this behavior:
1. Sensor Passivation and Default Zeroing: If an analog field instrument fails (wire break, out-of-range signal), the channel driver block (Pcs7AnIn or FbAnIn) switches to substitute value or zero output. If the substitute value is unconfigured, raw memory states can produce denormalized floating-point representations.
2. Uninitialized Interface Data Blocks: If custom interface data blocks or user-created SCL blocks pass data to the IEPH parameter pins without explicit initialization in OB100 (startup OB), the batch interface reads random memory artifacts.
3. Data Type Mismatches: A parameter configured as an integer (INT / DINT) in the SIMATIC BATCH Process Cell data may be interconnected to a 32-bit floating-point (REAL) parameter in CFC, causing bit-pattern misinterpretation.

IEEE 754 Floating-Point Underflow and Quality Codes in PCS 7

SIMATIC PCS 7 represents real numbers using single-precision 32-bit IEEE 754 floating-point format:
- Bit 31: Sign bit (0 = positive, 1 = negative).
- Bits 30-23: Exponent (8 bits, bias 127).
- Bits 22-0: Fraction / Mantissa (23 bits).

When a calculation produces a value smaller than the normalized minimum ($1.175494 \times 10^{-38}$), it enters the subnormal (denormalized) range. In SIMATIC S7-400 CPUs, operations on subnormal numbers can set the CPU Status Word flags OV (Overflow) and OS (Stored Overflow), leading to unexpected results in downstream logic.

Furthermore, in PCS 7 Advanced Process Library (APL), every analog signal consists of a composite structure:
- Value: The 32-bit REAL process variable.
- ST: The 8-bit Signal Status (Quality Code).

If the signal status is 16#00 (Bad, non-specific) or 16#28 (Bad, process-related), SIMATIC BATCH may continue to read the numeric Value field unless the phase logic explicitly evaluates ST and halts parameter forwarding.

Step-by-Step Procedure: Sanitizing CFC Signals Before Phase Handshake

Implement signal conditioning and clamping to protect the SIMATIC BATCH interface:

Step 1: Implement Signal Status Validation

In the CFC chart preceding the IEPH parameter connection, insert a signal validation block or use APL structured connections:
1. Ensure the phase logic evaluates the ST (Signal Status) byte.
2. If ST < 16#80 (indicating invalid or degraded signal), interlock the phase execution or hold the recipe step rather than passing an invalid floating-point value.

Step 2: Apply Range Clamping

Insert a limit block (such as Limit or a custom SCL clamping function) before passing actual values to the phase parameter.
Configure high and low clamping limits matching the physical engineering range (e.g., Min: 0.0, Max: 100.0).
If an input falls into a negative denormalized range, force the output to the defined engineering lower limit.

Step 3: Recompile and Propagate to SIMATIC BATCH

In SIMATIC Manager, compile the AS program (Changes only).
Download changes to the S7-400 CPU in RUN mode.
In SIMATIC Manager, right-click the BATCH object and perform Compile BATCH Objects.
Launch SIMATIC BATCH Control Center, open the Process Cell, and select PLC Data > Update Process Cell.
Close and release the updated master recipes to ensure parameter boundary alignment.

Comparative Matrix: Floating-Point Formats and Underflow Conditions

The table below outlines common binary representations of real numbers and their diagnostic interpretations in SIMATIC PCS 7 and SIMATIC BATCH:

Binary Hex PatternIEEE 754 RepresentationPCS 7 CFC DisplaySIMATIC BATCH BehaviorRoot Cause16#00000000$+0.0$0.0Normal (within valid limits)Normal zero state16#80000000$-0.0$-0.0Normal / Negative ZeroArithmetic underflow to zero16#00000001 to 16#007FFFFFDenormalized ($+10^{-38}$ to $+10^{-45}$)+0.0 or UnderflowLimit Violation (below low limit)Precision loss in mathematical calculation16#80000001 to 16#807FFFFFDenormalized ($-10^{-38}$ to $-10^{-45}$)-1.000000e-38Limit Violation (triggers fault)Underflow with sign bit set16#7F800000$+\infty$ (Positive Infinity)+INFLimit Violation (above high limit)Division by zero in SCL / CFC16#FF800000$-\infty$ (Negative Infinity)-INFLimit Violation (below low limit)Negative division by zero16#7FC00000NaN (Not a Number)NaNImmediate Phase Abort / ErrorInvalid floating-point operation

Verification

To confirm that the floating-point anomaly and limit violations are resolved:
1. Online CFC Verification: Monitor the IEPH parameter pins in CFC test mode while simulating sensor disconnection; verify that the output clamps cleanly to engineering minimum rather than underflowing.
2. Batch Control Center Execution: Run a test batch recipe in SIMATIC BATCH; confirm that steps transition without limit violation aborts.
3. Electronic Batch Record Audit: Inspect the generated batch log report; verify that process values and setpoints render in clean decimal format without exponent display artifacts.

Limitations and Operational Precautions

Engineering teams must observe the following precautions:
- Do not disable recipe limit validation globally in SIMATIC BATCH; doing so suppresses safety bounds and can lead to dangerous process runaway.
- Always verify that the physical engineering units configured in the Master Data Library match the unit of measurement assigned in the SIMATIC BATCH recipe header.
- Ensure all custom SCL blocks handling real arithmetic check for zero denominators prior to executing division operations to prevent NaN generation.

Engineer FAQ

Why did this limit violation appear after upgrading from PCS 7 v7.1 to v8.1?

PCS 7 v7.1 utilized standard classic libraries that passed raw REAL values without signal status bytes. PCS 7 v8.1 uses APL where structured variables pass both value and status. If legacy custom interface blocks were partially migrated, uninitialized status bytes or unhandled quality codes can cause the APL phase blocks to misinterpret boundary limits.

Can I disable limit checking on an equipment phase parameter in SIMATIC BATCH?

Yes. In the Master Data Library SFC Type or BATCH parameter definition, you can set the parameter attributes to disable low/high limit checking. However, this is not recommended for critical setpoints as it masks underlying field sensor failures.

Does an S7-400 CPU stop when an IEEE 754 underflow occurs?

No. The S7-400 CPU does not enter STOP mode on floating-point underflow. It sets the OV bit in the status register and continues execution. Only unhandled memory access errors or division by zero without OB121/OB122 present will cause a CPU STOP.