Troubleshooting SIMIT to S7-PLCSIM Output Coupling Synchronization in SIMATIC PCS 7 Virtual Commissioning

In SIMATIC PCS 7 virtual commissioning combining SIMIT Simulation Platform (e.g., v9.0 SP1) and S7-PLCSIM (v5.4), when simulation input signals (inputs to PLCSIM) function correctly but simulation output signals (actuator commands from PLCSIM) fail to update in SIMIT, the issue is caused by addressing mismatches between peripheral outputs (PQW) and process image partition (PIP) outputs. In standard PCS 7 Advanced Process Library (APL) logic, channel driver blocks (such as Pcs7DiOu / Pcs7AnOu) write directly to peripheral output memory (PQB/PQW/PQD) rather than the standard cyclic process image (Q). To resolve this, engineers must configure SIMIT coupling signals to target the exact peripheral addressing format, assign I/O modules to Process Image Partitions matching cyclic OB execution, or configure the SIMIT input connector address mapping.

Mechanism of SIMIT and S7-PLCSIM Memory Coupling

In SIMATIC PCS 7 virtual commissioning, SIMIT simulates plant physical behavior (valves, pumps, vessels, sensors) while S7-PLCSIM emulates the S7-400 CPU firmware executing the compiled automation logic:
- The PLCSIM Coupling in SIMIT establishes a high-speed shared memory communication pipeline with the PLCSIM execution process.
- Inputs to PLC (SIMIT Outputs -> PLCSIM Inputs): SIMIT writes simulated sensor values into the controller's Process Image Inputs (I) or Peripheral Inputs (PIW).
- Outputs from PLC (PLCSIM Outputs -> SIMIT Inputs): SIMIT monitors controller outputs to drive simulated actuators (e.g., valve travel, motor acceleration).

When inputs update reliably but outputs remain static, the communication coupling itself is healthy; the breakdown is strictly an address space addressing discrepancy between what the CFC blocks write and what SIMIT monitors.

Why Input Couplings Function While Output Couplings Fail

In standard STEP 7 ladder logic, programs write to standard process image output bits (e.g., Q 0.0). S7-PLCSIM buffers the Q memory area, which SIMIT reads effortlessly.

However, in SIMATIC PCS 7 APL architectures:
- Channel driver blocks (Pcs7DiOu, Pcs7AnOu, FbDiOu, FbAnOu) write directly to Peripheral Outputs (PA / PQW) to guarantee immediate hardware execution without waiting for the OB1 end-of-cycle update.
- S7-PLCSIM separates standard Process Image memory (Q) from Peripheral I/O memory (PQW).
- If SIMIT signals are declared as symbolic Process Image outputs (Q 512.0) while the channel driver writes directly to peripheral registers (PQW 512), SIMIT receives zero data updates, leaving the simulated actuator frozen.

Peripheral Outputs (PQW) vs Process Image Outputs (Q)

Addressing this requires aligning hardware configuration and simulation mapping:
- Process Image Partitions (PIP): In HW Config, I/O modules in PCS 7 are assigned to Process Image Partitions (e.g., PIP1 assigned to cyclic interrupt OB35). When a PIP is assigned, the CPU automatically updates the process image table upon OB35 entry and exit.
- SIMIT Coupling Signal Syntax: SIMIT supports direct peripheral addressing. Signals can be explicitly declared with the P prefix (e.g., PQW or PQD) in the SIMIT coupling editor to force the shared-memory driver to intercept direct peripheral write commands from PLCSIM.

Step-by-Step Procedure: Resolving Output Signal Synchronization

Follow this procedure to restore output signal coupling:

Step 1: Identify Output Addressing in CFC and HW Config

In SIMATIC Manager, open the CFC chart containing the output channel driver (e.g., Pcs7DiOu).
Inspect the output parameter connected to the fieldbus: e.g., PV_Out connected to address Q 512.0 (or PQW 512).
In HW Config, verify the module address and check if a Process Image Partition is assigned.

Step 2: Configure SIMIT Coupling Signal Table

Open the simulation project in SIMIT.
In the navigation tree, open Couplings > PLCSIM Coupling.
Switch to the Inputs tab (signals coming from PLCSIM into SIMIT).
Locate the problematic output signals.
If the address is mapped as Q 512.0, change the address syntax to PQW 512 (or ensure the connector block property maps to peripheral outputs).
Verify that the byte offset and data type (BOOL, INT, WORD) match the HW Config definition.

Step 3: Check SIMIT Component Connector Properties

On the SIMIT simulation diagram, select the output connector block receiving the PLC command.
Open the Properties task card; switch to the About tab.
Confirm that the connector signal name corresponds exactly to the active coupling signal entry.

Step 4: Restart Simulation

Reset S7-PLCSIM.
Start SIMIT simulation mode.
In CFC test mode, force the control output TRUE; observe that the SIMIT actuator indicator illuminates immediately.

Comparative Coupling Architecture Matrix in SIMIT

The table below compares SIMIT coupling interfaces:

Coupling TypeSupported AddressingUpdate SpeedRemote I/O SimulationBest Suited ForS7-PLCSIM (Classic)I, Q, PIW, PQW20 ms - 50 msYes (Requires proper PIP)Standard PCS 7 logic validationSIMIT Virtual ControllerNative S7-400 memoryDeterministic (1 ms - 10 ms)Full Native SupportHigh-fidelity multi-controller simulationPRODAVE (S7 Comms)DB, Flags, I/O50 ms - 100 msDirect physical PLC readHybrid hardware-in-the-loop test benches

Verification

To confirm that output coupling is functioning:
1. SIMIT Signal Table Inspection: In SIMIT, open the live signal monitor; verify that when a digital output is commanded in CFC, the corresponding SIMIT input bit transitions from 0 to 1.
2. Actuator Motion Check: Observe the graphical simulation sheet; confirm that valves open and motors accelerate in response to controller commands.
3. Closed-Loop Feedback: Verify that simulated feedback limit switches generated by SIMIT arrive back in PLCSIM inputs, successfully clearing valve travel monitoring alarms.

Limitations and Operational Precautions

Engineering teams must observe the following precautions:
- Demo or trial versions of older SIMIT releases had functional restrictions limiting simulation to central rack I/O; ensure a licensed version of SIMIT is utilized for distributed ET 200M/SP I/O simulation.
- Running S7-PLCSIM at high execution speeds without proper cycle time throttling in SIMIT can cause synchronization jitter; maintain a consistent calculation cycle (e.g., 50 ms).
- Always validate final license quantities and MLFBs against the applicable Siemens catalog and authorized distributor quotation when procuring SIMIT simulation licenses.

Engineer FAQ

Why did input signals work immediately while outputs required adjustments?

Input channel drivers (Pcs7AnIn / Pcs7DiIn) typically read from the Process Image Input table (I), which SIMIT writes directly. Output channel drivers write directly to peripheral hardware (PQW), which requires explicit peripheral signal declarations in SIMIT.

Can SIMIT simulate analog outputs formatted as REAL values?

S7-400 controllers output analog signals to physical modules as 16-bit integers (WORD / INT, scaled 0-27648). SIMIT must receive the integer and apply a scaling formula to convert it back to engineering units.

What is the advantage of SIMIT Virtual Controller over standard S7-PLCSIM?

SIMIT Virtual Controller (VC) compiles the PCS 7 logic into native code executed directly inside the SIMIT calculation kernel, eliminating inter-process communication overhead and supporting multiple synchronized controllers.

Technical References

Related Tags

SIMIT
S7-PLCSIM
Output Coupling
Peripheral Outputs
Virtual Commissioning

Virtual-Commissioning

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Troubleshooting SIMIT to S7-PLCSIM Output Coupling Synchronization in SIMATIC PCS 7 Virtual Commissioning