Troubleshooting Spurious Short-Circuit Faults on F-DO Modules (6ES7326-2BF10-0AB0) in SIMATIC PCS 7 F-Systems

In SIMATIC S7 F-Systems, intermittent short-circuit faults appearing on fail-safe digital output modules (6ES7326-2BF10-0AB0 F-DO10 x DC24V/2A) during or following controller downloads are caused by internal dark test timing violations, line capacitance, or floating unconfigured spare channels. The F-DO module executes continuous bit pattern tests (dark tests) by briefly switching off energized channels for microseconds to verify shutdown capability. If capacitive cable loads, relay coils, or missing ground bonds prevent output voltage from falling below threshold within the configured readback time, the module declares a short-circuit fault. Resolving this requires disabling unused spare channels, increasing the 'Max. readback time dark test' parameter, and bonding 24V supply ground to PE.

Operating Principles of Fail-Safe Digital Output Bit Pattern Tests (Dark Tests)

The SIMATIC S7-300 / ET 200M fail-safe digital output module 6ES7326-2BF10-0AB0 (F-DO10 x DC24V/2A) complies with SIL 3 / Cat. 4 / PL e safety standards:
* The Dark Test Mechanism:
To ensure output transistors have not failed short-circuited (which would prevent emergency shutdowns), the module's onboard microcontrollers execute periodic Dark Tests (bit pattern tests).
* Test Sequence:
An energized output is switched to 0V for a brief test period (typically 1 ms to 2 ms). The module's internal readback circuit measures the voltage across the terminal.
* Pass / Fail Criteria:
If the output voltage drops below the low-state threshold, the test passes and the output is instantly re-energized without de-energizing downstream mechanical contactors. If voltage does not drop fast enough, the module declares a fatal Short circuit to L+ and passivates the channel.

Why Program Downloads and Capacitive Loads Trigger Spurious Faults

Engineers frequently report that short-circuit faults appear erratically across different channels after downloading safety logic:
1. Line and Load Capacitance:
Long field cables, pilot indicator lamps with internal filter capacitors, or interposing relay suppression diodes store electrical charge. When the dark test switches off the output, stored capacitance discharges slowly, preventing the terminal voltage from falling within the factory default 1 ms readback window.
2. Floating Spare Channels:
Unused spare channels left enabled in HW Config with diagnostics active have no physical load resistor. With no discharge path, capacitive coupling between adjacent wires in the terminal duct keeps the open terminal high during the test pulse.
3. Download Timing Transients:
During an F-download, module parameter records are updated in RUN. If internal test timers re-synchronize while capacitive loads are fluctuating, transient test mismatches trip the channel into passivation.
4. Missing Instrument Ground Bonding:
If the negative pole (M) of the 24V DC auxiliary load power supply is not bonded to the control cabinet's protective earth (PE), common-mode voltage offsets shift the module's ground reference.

Comparison Table: F-DO Diagnostic Fault Types and Electrical Root Causes

The table below outlines diagnostic alarms generated by 6ES7326-2BF10-0AB0:

Logged Diagnostic MessagePhysical MechanismPrimary Root CauseCorrective Engineering ActionShort circuit to L+Voltage stays high during dark testHigh line capacitance; spare channel enabledIncrease readback time; disable spare channelsShort circuit to M / GroundExcessive current draw detectedTrue short circuit; defective solenoid coilInspect physical field wiring and resistanceCross-circuit faultTest pulse detected on adjacent channelChanneled wires pinched together in ductSeparate P-switching and M-switching conductorsWire break / Open circuitZero current detected in high stateBurnt lamp filament; unplugged connectorCheck terminal screws; verify minimum load (10 mA)

Hardware Configuration Parameters: Readback Time and Channel Deactivation

In HW Config -> Object Properties of 6ES7326-2BF10-0AB0:
* Max. Readback Time Dark Test:
Default: 1.0 ms. For capacitive loads or long field cables (>100 m), increase this parameter to 2.0 ms, 3.0 ms, or 5.0 ms. This grants sufficient time for stored charge to dissipate before evaluating test pass/fail.
* Channel Activation:
Set every un-wired spare channel to Deactivated. This disables dark testing and wire-break monitoring on unused terminals.

Step-by-Step Procedure to Eliminate Spurious F-DO Short-Circuit Alarms

Inspect Module Diagnostic Buffer (Ctrl+D):
Connect via Field PG. In HW Config, select the F-DO module and open Module Information -> Diagnostic Buffer. Note the exact channel and error code (Short circuit to L+).
Disable All Unused / Spare Channels:
* Double-click the F-DO module to open properties.
* Navigate to the Parameters tab.
* Under each spare channel, uncheck Activated (or set to Deactivated).
Adjust Dark Test Readback Time:
* In module properties, locate Max. readback time dark test.
* Increase the setting from 1.0 ms to 3.0 ms (or 5.0 ms if driving high-capacitance LED indicators).
Verify Cabinet Potential Equalization and Grounding:
* Ensure the M rail of the 24V DC sensor/actuator power supply is solidly bonded to the cabinet Protective Earth (PE) bar.
* Verify cabinet ground impedance is under 1 ohm.
Compile and Download Safety Program:
Compile HW Config and execute a safety download (PLC -> Download).
Depassivate Channels:
In CFC, pulse the depassivation input (ACK_REI / R_TRIG) to reintegrate all healthy channels into active operation.

Verification

To verify reliable F-DO operation:
1. Confirm that all channel status LEDs on the 6ES7326-2BF10-0AB0 illuminate green without red SF indicators.
2. Execute a test safety download to the CPU. Confirm that zero short-circuit faults are generated.
3. Energize and de-energize the field outputs 10 times in succession. Confirm that contactors actuate reliably without channel passivation.
4. Verify that the CPU diagnostic buffer contains zero OB82 diagnostic interrupt faults.

Limitations and Operational Precautions

Safety Integrity Limit on Readback Time: Increasing the readback time to 5 ms causes test pulses to last up to 5 ms. Ensure downstream sensitive high-speed solid-state relays do not trip during a 5 ms dark pulse.
Inductive Energy Clamping: Always equip inductive DC solenoids with flyback diodes or varistors to prevent high-voltage inductive kicks from damaging output transistors.
Licensing Disclaimer: S7 F-Systems engineering packages (6ES7658-2CX58-0YB5) and fail-safe hardware (6ES7326-2BF10-0AB0) require valid licenses and TÜV certificates of compliance.