Understanding and Configuring Process Image Partitions for PCS 7 Channel Blocks

In SIMATIC PCS 7 and S7-400 engineering, a Process Image Partition (PIP, or Partial Process Image / Teilprozessabbild TPA) is a segmented portion of the CPU input and output memory updated synchronously with a specific cyclic interrupt organization block (OB30-OB38) rather than the standard OB1 main scan. When configuring channel blocks like FbDrive, the hardware I/O module must be assigned to the exact same Process Image Partition as the cyclic interrupt OB hosting the CFC chart, guaranteeing that field signals are acquired and commands dispatched without jitter, timing skew, or missed pulse counts.

Architecture and Purpose of Process Image Partitions (PIP)

In traditional PLC programming (such as standard STEP 7 in S7-300), all physical inputs are read into the Process Image Input table (PII) at the start of OB1, and outputs are written from the Process Image Output table (PIQ) at the conclusion of OB1.

In SIMATIC PCS 7 process control systems:
* Asynchronous Execution Architecture: PCS 7 control logic does not execute in OB1. Control algorithms execute inside deterministic cyclic interrupt organization blocks (OB30 to OB38), running at fixed sample times:
* OB38: 10 ms
* OB35: 100 ms (standard process control baseline)
* OB34: 200 ms
* OB32: 1000 ms (1.0 s)
* The Timing Skew Dilemma: If an analog input or drive control word is updated in OB1 (which fluctuates between 15ms and 80ms), but the CFC algorithm executing FbDrive or Pcs7AnIn runs in OB35 (every 100ms), the block reads stale or asynchronously changing data, introducing phase jitter into PID loops.
* Process Image Partition (PIP): Assigning an I/O module to a PIP (e.g., PIP 1 assigned to OB35) instructs the S7-400 CPU operating system to read the hardware inputs immediately before calling OB35 and write the outputs immediately upon OB35 completion.

+-------------------------------------------------------------+
| HW Config: Drive Module Address IW 512 / QW 512             |
| Assigned to: Process Image Partition 1 (PIP 1)              |
+-------------------------------------------------------------+
                              |
                              v Synchronous Hardware Update
+-------------------------------------------------------------+
| Cyclic Interrupt OB 35 (100 ms Cycle)                       |
| 1. CPU OS reads physical inputs into PIP 1                  |
| 2. CFC Chart executes: [FbDrive Block] processes data       |
| 3. CPU OS writes PIP 1 outputs to physical hardware         |
+-------------------------------------------------------------+

Step-by-Step Procedure to Align PIP and CFC Organization Blocks

Follow this procedure to assign hardware I/O to a PIP and place the corresponding channel block in the correct cyclic interrupt.

Prerequisites

SIMATIC Manager open with write access to the target AS project.
Hardware configuration opened in HW Config.

Step 1: Assign I/O Module to a Process Image Partition in HW Config

In SIMATIC Manager, open HW Config.
Double-click the target I/O module or drive communication board (e.g., ET 200M AI module or SINAMICS drive node).
Select the Addresses tab.
Locate the Process Image dropdown menu for both Inputs and Outputs.
Instead of OB1-PA, select a specific partition:
* Select PIP 1 (by default linked to OB35 in PCS 7).
* Note: The dropdown displays the OB associated with each PIP (e.g., PIP 1 (OB35), PIP 2 (OB34)).
Click OK, then execute Station -> Save and Compile.

Step 2: Verify CPU Organization Block to PIP Mapping

In HW Config, double-click the CPU 410 / S7-400 to open its properties.
Navigate to the Cycle/Clock Memory tab.
Review the Process Image Partitions assignment table. Confirm which cyclic interrupt OB is mapped to which PIP number (e.g., OB35 = PIP 1, OB32 = PIP 4).
Ensure the cycle time configured for that OB matches your engineering design.

Step 3: Insert and Place Channel Block in CFC

Open the CFC chart where the technological block (e.g., FbDrive) is instantiated.
Select the block, open its properties (Alt + Enter), or open the CFC Runtime Editor (Ctrl + Shift + R).
Locate the insertion point of the block.
Ensure the block is inserted into the runtime group of the same OB mapped to the PIP:
* If the hardware was assigned to PIP 1, the block must reside in OB35.
* If the block is placed in OB32 (1s) while hardware is in PIP 1 (100ms), compile warnings occur and diagnostic tracking is compromised.

Verification

In SIMATIC Manager, compile the CFC chart folder: Chart -> Compile -> Changes Only with Generate module drivers enabled.
Confirm that the compiler finishes with 0 warnings regarding process image partition mismatches.
Open the CFC chart in dynamic test mode. Verify that drive status words update smoothly without intermittent communication dropouts.
For pulse or totalizer inputs, confirm that counts match field flow meters without percentage losses caused by missed execution cycles.

Limitations and Operational Precautions

Total Local Process Image Limits: S7-400 CPUs have a maximum configurable process image size (e.g., up to 16 KB depending on CPU model). Assigning large blocks of addresses to high-frequency PIPs (such as OB38 running at 10ms) increases CPU cycle overhead.
Never Leave PCS 7 Field I/O in OB1-PA: In PCS 7, field I/O assigned to OB1-PA causes driver blocks to report inconsistent quality codes, because OB1 has the lowest priority and can be interrupted arbitrarily by cyclic OBs.
Consistent Input/Output Assignment: Always assign both the Input addresses and Output addresses of a bidirectional device (like a variable frequency drive) to the same PIP; splitting inputs and outputs across different PIPs leads to command race conditions.

Engineer FAQ

Can I randomly assign any PIP number to an I/O module?
No. You must choose the PIP that maps to the cyclic OB where the block will execute. If your block runs in OB35 (100ms), assign the module to PIP 1 (or whichever PIP is mapped to OB35 in CPU properties).
What happens if a totalizer pulse input is in a 1-second PIP but the pulse is 200ms wide?
The CPU will miss more than 50% of incoming pulses because the hardware input is only sampled once per second, resulting in severe measurement error.
Why does PCS 7 not use peripheral addressing (PIW/PQW) instead of PIP?
Direct peripheral addressing (PIW/PQW) bypasses CPU memory tables, causing significant execution delays on the central memory bus during each instruction call. Process Image Partitions allow fast, block-oriented memory reading.
How does "Generate module drivers" handle PIPs?
The Module Driver Generator reads the hardware PIP assignment in HW Config and automatically configures diagnostic blocks (MOD_D1, RACK) to execute in the corresponding cyclic OB.
Can multiple cyclic OBs share the same PIP?
No. Each Process Image Partition is strictly assigned to a single organization block to maintain deterministic execution.

Technical References

Siemens Industry Online Support Entry ID 64181993: Integration of Drive Systems into PCS 7 Using FbDrive.
Siemens System Manual: S7-400 CPU Specifications and Memory Architecture.
Siemens SIMATIC PCS 7 CFC Manual: Runtime Attributes and Organization Blocks.

Understanding and Configuring Process Image Partitions for PCS 7 Channel Blocks