Understanding Inverted Execution Sequences and Latency Glyphs on CFC Signal Connections in PCS 7

In the SIMATIC PCS 7 CFC editor, a visual indicator glyph (displayed as a small symbol or clock/delay marker on a signal connection line between blocks) indicates an inverted execution sequence that introduces a one-cycle processing delay (dead time). This occurs when the destination block is configured to execute earlier in the cyclic interrupt organization block (e.g., OB35) than the source block producing the output. Consequently, the downstream block reads the calculated data from the prior execution cycle rather than the current cycle. To resolve this latency and remove the indicator sign, reorder the execution sequence using 'Options > Optimize Run Sequence' in CFC or manually reposition the source block before the destination block in the Run Sequence editor.

Executive Summary

Continuous Function Charts (CFC) in SIMATIC PCS 7 provide an intuitive graphical environment for designing continuous, batch, and discrete automation logic. However, graphical proximity on a chart does not dictate the actual chronological order in which the AS controller processes blocks. When an engineer connects an output of Block A to an input of Block B, CFC evaluates their relative positions in the cyclic interrupt task schedule. If Block B executes ahead of Block A, the signal transfer incurs a 1-cycle latency (e.g., 100 ms in OB35). CFC highlights this temporal inversion by rendering an explicit delay glyph directly on the interconnection line. Understanding this mechanism allows engineers to eliminate unexpected phase delays in high-speed closed-loop control circuits.

Architecture and Fundamental Mechanics

The execution scheduling engine in SIMATIC PCS 7 Continuous Function Charts relies on a deterministic cyclic model:

The Task Scheduler and Organization Blocks (OBs):
* Logic in PCS 7 executes inside cyclic interrupt OBs (e.g., OB35 with a 100 ms period, OB32 with a 1000 ms period).
* Within an OB, blocks execute sequentially according to their order in the Run Sequence (Edit > Run Sequence).
The Chronological Signal Propagation Rule:
* Normal Execution: If Block A executes at position 1 and Block B executes at position 2 in OB35, Block A calculates its output at time t. Block B immediately executes within the same OB35 slice and consumes Block A's new value with zero cycle delay.
* Inverted Execution: If Block B executes at position 1 and Block A executes at position 2, Block B runs first, reading whatever value Block A left in memory during the previous OB35 cycle (t - 100ms). Block A then executes and updates its output, but Block B will not process that value until the next OB35 activation.
The Connection Line Indicator Glyph:
* CFC detects when a connection line transfers data 'backwards' in execution order.
* To alert the control engineer to this hidden dynamic delay, CFC renders an indicator symbol (a cycle delay glyph, often depicted as a small tick/bracket or delay glyph) directly on the connection line.
* While benign in slow thermal systems, an inverted sequence in fast PID control loops, anti-surge algorithms, or ratio flow controllers introduces unmodeled phase lag, potentially causing closed-loop instability.

Step-by-Step Implementation Procedure

Follow these procedures to inspect, understand, and correct inverted run sequences in CFC:

Inspect the Execution Positions in CFC:
* In the CFC chart, look at the block header of the source block (where the output originates) and the destination block (where the input connects).
* Note the runtime position numbers displayed in the block headers: format (<OB_Number>/<Position_Number>) (e.g., Source Block = (35/15), Destination Block = (35/8)).
* If the destination position number is lower than the source position number within the same OB, the sequence is inverted, triggering the glyph.
Run Automated Sequence Optimization (Recommended):
* In the CFC editor menu, select Options > Optimize Run Sequence....
* In the confirmation dialog, ensure that the scope covers the target chart or the entire S7 program.
* Click OK.
* The CFC optimization algorithm analyzes all data dependencies across charts and automatically re-indexes the blocks so that upstream signal producers execute before downstream consumers.
* Observe that the delay glyph on the connection line disappears immediately.
Manual Reordering via the Run Sequence Editor:
* If automated optimization is restricted (for instance, to preserve specific custom execution sequencing in complex control schemes):
* Select Edit > Run Sequence... (or press Ctrl + F5).
* In the task hierarchy, expand the relevant Organization Block (e.g., OB35).
* Locate the destination block and the source block within their respective runtime groups.
* Drag the source block upward so that it is positioned above the destination block in the execution list.
* Close the Run Sequence editor.
Compile and Download Changes:
* Select Chart > Compile > Scope: Changes only.
* Download the changes to the AS controller in RUN mode.
* The AS controller seamlessly updates the execution pointers at the next cyclic OB boundary without stopping the CPU.

Verification

After optimizing or reordering the run sequence, inspect the connection line in the CFC chart. Confirm that the delay glyph has disappeared. Check the block headers; verify that the source block's position number is strictly lower than the destination block's position number (e.g., (35/8) followed by (35/9)). In online test mode, verify that parameter changes on the upstream block reflect on the downstream block within the same cycle.

Limitations and Operational Precautions

In feedback loops (such as closed-loop PID control where the output of a PID controller affects a process model whose output feeds back into the PV input), a one-cycle delay is mathematically unavoidable. In closed loops, CFC will always show the delay glyph on at least one return connection to indicate the feedback boundary.

Engineer FAQ

Does the delay glyph mean there is a compilation error?

No. The delay glyph is purely an informational visual warning alerting the engineer to an execution sequence delay; it does not block compilation or download.

Why did the glyph appear after copying a chart?

When charts are copied, newly inserted blocks are often placed at the end of the runtime group, causing downstream blocks to execute before upstream blocks until the run sequence is optimized.

Can an inverted run sequence destabilize a PID loop?

Yes. In fast control loops (e.g., pressure or compressor anti-surge), adding an extra 100 ms of dead time degrades phase margin and can induce oscillations.