C135 PCS 7 (PCS7)
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Why Blocks in CFC Charts Are Called by OB35 - Execution Cycle Fundamentals in PCS 7

Why Blocks in CFC Charts Are Called by OB35 - Execution Cycle Fundamentals in PCS 7

In SIMATIC PCS 7, function blocks inserted into Continuous Function Charts (CFC) default to execution in Organization Block OB35 (100 ms cyclic interrupt) rather than OB1 (free-running cyclic execution) to guarantee strict deterministic execution timing. Unlike discrete manufacturing PLCs where code executes sequentially in a variable-duration OB1 scan loop, process control algorithms—including PID controllers (PIDConL), filters, integrators, and motor control drivers—require an invariant sample time (SampleTime) for mathematically accurate numerical calculations. Furthermore, PCS 7 coordinates process image partition updates (PIP) with cyclic interrupts, ensuring jitter-free I/O acquisition and preventing control loop instability.

Table of Contents

Executive Summary

Engineers transitioning from classical PLC programming (such as Step 7 LAD/FBD or TIA Portal) to SIMATIC PCS 7 distributed control systems often wonder why CFC charts place newly inserted blocks into Organization Block OB35 by default instead of the familiar OB1 cyclic task. In process automation, time-varying scan times introduce dynamic phase lag and unpredictable calculation errors into continuous differential equations governing PID loops, totalizers, and ramp generators. This guide analyzes the architectural, mathematical, and scheduling principles of cyclic interrupt OBs (OB30 through OB38) in PCS 7, explains the synchronization of process image partitions, and provides best practices for task assignment and CPU load balancing.

Architecture and Fundamental Mechanics

Architectural Comparison: OB1 vs. Cyclic Interrupt OB35

CLASSICAL PLC EXECUTION (OB1 - Free-Running Cycle):
+-------------------------------------------------------------------------+
| Read Physical Inputs -> Execute User Logic -> Write Physical Outputs    |
| Cycle 1: 18 ms   | Cycle 2: 45 ms (Heavy Comm) | Cycle 3: 22 ms        |
| Result: Variable scan time dt destabilizes derivative and integral math.|
+-------------------------------------------------------------------------+

PCS 7 DETERMINISTIC DCS EXECUTION (Cyclic Interrupts OB30-OB38):
+-------------------------------------------------------------------------+
| Hardware Clock Timer Interrupt fires strictly every 100.0 ms            |
|                                                                         |
|   [Interrupt Trigger]                                                   |
|          |                                                              |
|          v                                                              |
|   +-----------------------------------------------------------------+   |
|   | 1. Update Process Image Partition (PIP 1)                       |   |
|   | 2. Execute OB35 Runtime Group (Drivers -> Interlocks -> PIDs)   |   |
|   | 3. Output Process Image Partition (PIP 1) to Fieldbus           |   |
|   +-----------------------------------------------------------------+   |
|          |                                                              |
|          v Execution completes in e.g. 24 ms                            |
|   [CPU returns to background tasks (OB1 / Comm) until next 100 ms tick] |
+-------------------------------------------------------------------------+

Mathematical Principles Governing Process Control

  1. Discrete PID Mathematics: The standard discrete position algorithm implemented in PIDConL computes:
    $$u(k) = K_p \cdot e(k) + K_i \cdot \Delta t \cdot \sum e(k) + K_d \cdot \frac{e(k) - e(k-1)}{\Delta t}$$
    Here, $\Delta t$ is assumed by the block algorithm to be exactly equal to the configured parameter SampleTime (e.g., 0.1 s). If logic were scheduled in OB1, where cycle times fluctuate based on network communication and diagnostic logging, variations in real $\Delta t$ introduce artificial derivative spikes and integral drift.
  2. Process Image Partitions (PIP): PCS 7 assigns specific process image partitions to specific cyclic interrupts (e.g., PIP 1 mapped to OB35). Hardware inputs mapped to PIP 1 are sampled by the CPU operating system immediately before OB35 executes, and outputs are transferred to fieldbus modules immediately upon OB35 completion, eliminating jitter.
  3. Task Prioritization Hierarchy: OB35 runs at hardware interrupt priority 12, preempting the background cycle OB1 (priority 1). If a massive WinCC OS communication packet arrives, OB1 is paused, but OB35 interrupts seamlessly, guaranteeing real-time control safety.

Step-by-Step Implementation Procedure

Step 1: Inspect Default Insertion Settings in CFC

  1. In SIMATIC Manager, open any CFC chart.
  2. Select Options > Customize > Compilation/Download....
  3. Note the default cyclic interrupt assigned for newly inserted blocks: OB35 (100ms).
  4. When a block is dragged from the catalog into CFC, it is automatically assigned to a runtime group within OB35.

Step 2: Understand the OB30-OB38 Spectrum for Task Distribution

  1. Review the standard execution intervals available in S7-400 / CPU 410-5H controllers:
    - OB38: 10 ms (High-speed turbine or anti-surge control)
    - OB36: 50 ms (Fast motor drives and precision positioning)
    - OB35: 100 ms (Standard process control: analog inputs, valves, motors, PIDs)
    - OB34: 200 ms (Secondary loops and slow process monitoring)
    - OB33: 500 ms (Tank inventory, slow level measurements)
    - OB32: 1000 ms (1.0 s - Temperature control, thermal furnaces, stack emissions)
    - OB31: 2000 ms (2.0 s - Environmental reporting, slow totalizers)
    - OB30: 5000 ms (5.0 s - Non-critical background calculations)

Step 3: Relocating Slow Loops to Balance CPU Execution Load

  1. In the CFC editor, open the Runtime Editor by clicking the Runtime Group button on the toolbar (or press Ctrl+Shift+R).
  2. Expand the left tree: Task > OB35.
  3. Locate slow temperature control charts (e.g., RTDs, heat exchangers).
  4. Select the chart runtime group in OB35, drag and drop it into OB32 (1000ms).
  5. In the temperature controller block (PIDConL), verify that the parameter SampleTime automatically updates to 1.0 (or update it manually if block customization disables automatic propagation).

Step 4: Configuring Process Image Partitions in HW Config

  1. Open HW Config for the controller.
  2. Open the properties of the analog input/output modules or interface modules (ET 200M / ET 200SP).
  3. Under the Addresses tab, verify the Process Image assignment.
  4. Ensure the module is assigned to PIP 1 (or the corresponding partition assigned to OB35/OB32) so I/O scanning remains synchronous with block execution.
  5. Save and compile HW Config.

Verification

  1. CPU Load Inspection via Module Information: In SIMATIC Manager, select the CPU and press Ctrl+D. Open the Performance Data tab. Check the execution time of OB35. Ensure OB35 execution duration does not exceed 30% to 50% of the 100 ms budget (i.e., less than 30-50 ms).
  2. CPU_RT Block Diagnostics: In CFC, inspect the @CPU_RT block (generated automatically during module driver compilation). Check the outputs NETTRT (net cycle time) and MAXTRT (maximum run time) to confirm stable cyclic margins.
  3. CFC Block Sequencing: In the CFC Runtime Editor, select Options > Optimize Run Sequence. Verify that all input driver blocks (Pcs7AnIn, Pcs7DiIn) execute before control blocks (PIDConL, MotL), and control blocks execute before output driver blocks (Pcs7AnOu, Pcs7DiOu).

Limitations and Operational Precautions

  1. OB80 Time Error Risk: If too many charts are assigned to OB35, the net execution time can exceed 100 ms. If a second OB35 interrupt occurs before the previous one completes, the CPU issues an OB80 time error. If OB80 is not loaded in the CPU block folder, the CPU enters STOP.
  2. SampleTime Synchronization: Never change the hardware interrupt frequency of an OB in CPU Properties (e.g., changing OB35 from 100 ms to 80 ms) without updating the SampleTime parameter on all blocks inside that OB; otherwise, integral and derivative calculations will suffer calibration errors.

Engineer FAQ

Why does PCS 7 not use OB1 for user control logic?

OB1 scan time varies continuously with communication and diagnostic load. Inconsistent execution intervals destabilize PID feedback control and totalizers.

Can I put all my CFC blocks in OB35?

While small to medium projects can run mostly in OB35, large plants with thousands of I/O should distribute slow temperature loops and inventory totalizers to OB32 (1s) to prevent CPU overloads.

What happens if OB35 takes longer than 100 ms to execute?

The CPU operating system calls OB80 (Time Error). If OB80 is present, the CPU remains in RUN and logs an alarm; if the overrun persists or OB80 is missing, the CPU enters STOP.

Does changing a block from OB35 to OB32 require an AS stop?

No. Moving runtime groups between cyclic interrupt OBs can be compiled and downloaded via 'Changes Only' while the CPU is in RUN.

How does CFC ensure driver blocks run before logic blocks?

CFC utilizes automated runtime sequencing. During chart compilation, PCS 7 automatically places input drivers at the start of the OB and output drivers at the end.

What is the role of Process Image Partitions (PIP)?

PIPs synchronize hardware I/O updates with the execution of specific cyclic interrupt OBs, ensuring input data is fresh and outputs are transmitted immediately without jitter.

Can I create custom cyclic interrupt OBs?

No. S7-400 and CPU 410 hardware architectures support exactly nine predefined cyclic interrupt OBs (OB30 through OB38).

What is the execution priority of OB35?

By default, OB35 runs at priority class 12, which is higher than OB1 (priority 1) and communication tasks, but lower than diagnostic interrupts (OB82) and time error interrupts (OB80).

Why do digital input blocks also default to OB35?

Running digital logic in OB35 provides deterministic debouncing, pulse capture, and synchronous interlocking with motorized actuators and safety sequences.

Where can I monitor CPU cycle load online?

In SIMATIC Manager via Module Information (Ctrl+D) under Performance Data, or via the APL @CPU_RT diagnostics block in CFC.

Technical References

Related Articles

Related Tags

  • OB35
  • CFC Execution
  • Cyclic Interrupt
  • Deterministic Control
  • Process Image Partition
  • PIDConL
  • CPU Scheduling
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